Tai-Hsing Wen
According to our database1,
Tai-Hsing Wen
authored at least 5 papers
between 2019 and 2020.
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Bibliography
2020
15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
Physically Tightly Coupled, Logically Loosely Coupled, Near-Memory BNN Accelerator (PTLL-BNN).
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
A 0.5V Real-Time Computational CMOS Image Sensor with Programmable Kernel for Always-On Feature Extraction.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019