Wei-Hsing Huang

According to our database1, Wei-Hsing Huang authored at least 10 papers between 1998 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
A Twin-8T SRAM Computation-in-Memory Unit-Macro for Multibit CNN-Based AI Edge Processors.
IEEE J. Solid State Circuits, 2020

A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors.
IEEE J. Solid State Circuits, 2020

15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

A Two-way SRAM Array based Accelerator for Deep Neural Network On-chip Training.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A 55nm 1-to-8 bit Configurable 6T SRAM based Computing-in-Memory Unit-Macro for CNN-based AI Edge Processors.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

1998
ATPRG: an automatic test program generator using HDL-A for fault diagnosis of analog/mixed-signal integrated circuits.
IEEE Trans. Instrum. Meas., 1998

Diagnosability analysis of analogue circuits.
Int. J. Circuit Theory Appl., 1998

Test points selection process and diagnosability analysis of analog integrated circuits.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998


  Loading...