Tzu-Hsiang Hsu

Orcid: 0000-0001-7481-075X

According to our database1, Tzu-Hsiang Hsu authored at least 19 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2023
A 0.8 V Intelligent Vision Sensor With Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique for Image Classification.
IEEE J. Solid State Circuits, November, 2023

A Multimode Vision Sensor With Temporal Contrast Pixel and Column-Parallel Local Binary Pattern Extraction for Dynamic Depth Sensing Using Stereo Vision.
IEEE J. Solid State Circuits, October, 2023

2022
A 0.8V Intelligent Vision Sensor with Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique for Image Classification.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
A 0.5-V Real-Time Computational CMOS Image Sensor With Programmable Kernel for Feature Extraction.
IEEE J. Solid State Circuits, 2021

A 0.8 V Multimode Vision Sensor for Motion and Saliency Detection With Ping-Pong PWM Pixel.
IEEE J. Solid State Circuits, 2021

A 12-Bit SAR ADC with Reference Voltage Ripple Suppression.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

5.9 A 0.8V Multimode Vision Sensor for Motion and Saliency Detection with Ping-Pong PWM Pixel.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

A Monolithic Optical Encoder using CMOS Image Sensor with Background Light Cancellation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A Current-Mode Differential Sensing CMOS Imager for Optical Linear Encoder.
Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

A 0.5V Real-Time Computational CMOS Image Sensor with Programmable Kernel for Always-On Feature Extraction.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018
A CMOS Time-of-Flight Depth Image Sensor With In-Pixel Background Light Cancellation and Phase Shifting Readout Technique.
IEEE J. Solid State Circuits, 2018

A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A Neuromorphic Computing System for Bitwise Neural Networks Based on ReRAM Synaptic Array.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

A CMOS Imager for Reflective Pulse Oximeter with Motion Artifact and Ambient Interference Rejections.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017
A CMOS imaging platform using single photon avalanche diode array in standard technology.
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017

2011
An interactive flower image recognition system.
Multim. Tools Appl., 2011


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