Takuya Saraya

According to our database, Takuya Saraya authored at least 13 papers between 2011 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2023

A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel and InSnOx Electrode with Normally-off Operation, High Mobility and Reliability for 3D Integrated Devices.

Kaito Hikake, Zhuo Li, Junxiang Hao, Chitra Pandy, Takuya Saraya, Toshiro Hiramoto, Takanori Takahashi, Mutsunori Uenuma, Yukiharu Uraoka, Masaharu Kobayashi

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

3-Layer stacked pixel-parallel CMOS image sensors using hybrid bonding of SOI wafers.

Masahide Goto, Yuki Honda, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

Proceedings of the Imaging Sensors and Systems 2022, online, January 15-26, 2022, 2022

2021

Recent Progress of Double/Dual-Gate Silicon IGBT Technologies.

Toshiro Hiramoto, Takuya Saraya

Proceedings of the 14th IEEE International Conference on ASIC, 2021

2019

Scalability Study on Ferroelectric-HfO2 Tunnel Junction Memory Based on Non-equilibrium Green Function Method.

Fei Mo, Yusaku Tagawa, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi

Proceedings of the 19th Non-Volatile Memory Technology Symposium, 2019

Triple-Layering Technology for Pixel-Parallel CMOS Image Sensors Developed by Hybrid Bonding of SOI Wafers.

Masahide Goto, Joeri De Vos, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Eiji Higurashi, Yuki Honda, Takuya Saraya, Masaharu Kobayashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

2018

New Methodology for Evaluating Minority Carrier Lifetime for Process Assessment.

Kuniyuki Kakushima, Takuya Hoshii, M. Watanabe, N. Shizyo, K. Furukawa, Takuya Saraya, T. Takakura, K. Itou, M. Fukui, S. Suzuki, Ken Takeuchi, Iriya Muneta, Hitoshi Wakabayashi, Y. Numasawa, Atsushi Ogura, Shinichi Nishizawa, Kazuo Tsutsui, Toshiro Hiramoto, H. Ohashi, Hiroshi Iwai

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Quarter Video Graphics Array Full-Digital Image Sensing with Wide Dynamic Range and Linear Output Using Pixel-Wise 3D Integration.

Masahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Verification of the Injection Enhancement Effect in IGBTs by Measuring the Electron and Hole Currents Separately.

Takuya Hoshii, Kazuyoshi Furukawa, Kuniyuki Kakushima, Masahiro Watanabe, Naoyuki Shigvo, Takuya Saraya, Toshihiko Takakura, Kazuo Itou, Munetoshi Fukui, Shinichi Suzuki, Kiyoshi Takeuchi, Iriya Muneta, Hitoshi Wakabayashi, Shinichi Nishizawa, Kazuo Tsutsui, Toshiro Hiramoto, Hiromichi Ohashi, Hiroshi Lwai

Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017

3D scaling for insulated gate bipolar transistors (IGBTs) with low Vce(sat).

Kazuo Tsutsui, Kuniyuki Kakushima, Takuya Hoshii, A. Nakajima, Shinichi Nishizawa, Hitoshi Wakabayashi, Iriya Muneta, K. Sato, Tomoko Matsudai, Wataru Saito, Takuya Saraya, K. Itou, M. Fukui, S. Suzuki, Masaharu Kobayashi, T. Takakura, Toshiro Hiramoto, Atsushi Ogura, Y. Numasawa, Ichiro Omura, H. Ohashi, Hiroshi Iwai

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015

Three-dimensional integrated circuits and stacked CMOS image sensors using direct bonding of SOI layers.

Masahide Goto, Kei Hagiwara, Yoshinori Iguchi, Hiroshi Ohtake, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

Proceedings of the 2015 International 3D Systems Integration Conference, 2015

2013

Experimental Demonstration of Post-Fabrication Self-Improvement of SRAM Cell Stability by High-Voltage Stress.

Toshiro Hiramoto, Anil Kumar, Takuya Saraya, Shinji Miyano

IEICE Trans. Electron., 2013

NBTI Reliability of PFETs under Post-Fabrication Self-Improvement Scheme for SRAM.

Nurul Ezaila Alias, Anil Kumar, Takuya Saraya, Shinji Miyano, Toshiro Hiramoto

IEICE Trans. Electron., 2013

2011

Statistical advantages of intrinsic channel fully depleted SOI MOSFETs over bulk MOSFETs.

Toshiro Hiramoto, Anil Kumar, Tomoko Mizutani, Jun Nishimura, Takuya Saraya

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011