Shinichi Nishizawa

Orcid: 0000-0002-1172-7286

According to our database1, Shinichi Nishizawa authored at least 39 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Area Efficient Approximate 4-2 Compressor and Probability-Based Error Adjustment for Approximate Multiplier.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2023

Libretto: An Open Cell Timing Characterizer for Open Source VLSI Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., March, 2023

IGBT Power Module Design for Suppressing Gate Voltage Spike at Digital Gate Control.
IEEE Access, 2023

Evaluation of Application-Independent Unbiased Approximate Multipliers on Quantized Convolutional Neural Networks.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

An 8-point Approximate DCT Design with Optimized Signed Digit Encoding.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Prime Factorization Based on Multiple Quantum Annealings on Partial Constraints with Analytical Variable Reduction.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

A Hardware-Efficient Approximate Multiplier Combining Inexact Same-weight N:2 Compressors and Remapping Logic with Error Recovery.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

2022
NCTUcell: A DDA- and Delay-Aware Cell Library Generator for FinFET Structure With Implicitly Adjustable Grid Map.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Reduction of LSI Maximum Power Consumption with Standard Cell Library of Stack Structured Cells.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022

Density Aware Cell Library Design for Design-Technology Co-Optimization.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

2021
Supplemental PDK for ASAP7 Using Synopsys Flow.
IPSJ Trans. Syst. LSI Des. Methodol., 2021

2020
Universal NBTI Compact Model Replicating AC Stress/Recovery from a Single-shot Long-term DC Measurement.
IPSJ Trans. Syst. LSI Des. Methodol., 2020

MCell: Multi-Row Cell Layout Synthesis with Resource Constrained MAX-SAT Based Detailed Routing.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
Analog circuit design methodology utilizing a structure of thin BOX FDSOI.
IEICE Electron. Express, 2019

Drive-Strength Selection for Synthesis of Leakage-Dominant Circuits.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

Compact Modeling of NBTI Replicating AC Stress / Recovery from a Single-shot Long-term DC Measurement.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

NCTUcell: A DDA-Aware Cell Library Generator for FinFET Structure with Implicitly Adjustable Grid Map.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019


2018
DC-bias-voltage dependence of degradation of aluminum electrolytic capacitors.
Microelectron. Reliab., 2018

ESR and capacitance monitoring of a dc-link capacitor used in a three-phase PWM inverter with a front-end diode rectifier.
Microelectron. Reliab., 2018

Design Methodology for Variation Tolerant D-Flip-Flop Using Regression Analysis.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

Minimization of Vote Operations for Soft Error Detection in DMR Design with Error Correction by Operation Re-Execution.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

New Methodology for Evaluating Minority Carrier Lifetime for Process Assessment.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Process variation aware D-Flip-Flop design using regression analysis.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

Verification of the Injection Enhancement Effect in IGBTs by Measuring the Electron and Hole Currents Separately.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017
Pin accessibility evaluating model for improving routability of VLSI designs.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017


2016
Design and Analysis of a New Evaluation Circuit for Capacitors Used in a High-Power Three-Phase Inverter.
IEEE Trans. Ind. Electron., 2016

Temperature rise measurement for power-loss comparison of an aluminum electrolytic capacitor between sinusoidal and square-wave current injections.
Microelectron. Reliab., 2016

2015
Layout Generator with Flexible Grid Assignment for Area Efficient Standard Cell.
IPSJ Trans. Syst. LSI Des. Methodol., 2015

An impact of process variation on supply voltage dependence of logic path delay variation.
Proceedings of the VLSI Design, Automation and Test, 2015

2014
Design methodology of process variation tolerant D-Flip-Flops for low voltage circuit operation.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Variation-aware Flip-Flop energy optimization for ultra low voltage operation.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

2013
Standard Cell Structure with Flexible P/N Well Boundaries for Near-Threshold Voltage Operation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

Analysis and comparison of XOR cell structures for low voltage circuit design.
Proceedings of the International Symposium on Quality Electronic Design, 2013

2012
A Standard Cell Optimization Method for Near-Threshold Voltage Operations.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012

A flexible structure of standard cell and its optimization method for near-threshold voltage operation.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011
Modeling of Random Telegraph Noise under circuit operation - Simulation and measurement of RTN-induced delay fluctuation.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2009
An Efficient Hardware Accelerator for Power Grid Simulation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009


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