Tayfun Gokmen

According to our database1, Tayfun Gokmen authored at least 21 papers between 2016 and 2024.

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Bibliography

2024
Multi-Function Multi-Way Analog Technology for Sustainable Machine Intelligence Computation.
CoRR, 2024

2023
Fast offset corrected in-memory training.
CoRR, 2023

Solving Sparse Linear Systems via Flexible GMRES with In-Memory Analog Preconditioning.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2023

2022
Neural Network Training With Asymmetric Crosspoint Elements.
Frontiers Artif. Intell., 2022

2021
Enabling Training of Neural Networks on Noisy Hardware.
Frontiers Artif. Intell., 2021

Solving sparse linear systems with approximate inverse preconditioners on analog devices.
Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

A Flexible and Fast PyTorch Toolkit for Simulating Training and Inference on Analog Crossbar Arrays.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
Training Large-scale Artificial Neural Networks on Simulated Resistive Crossbar Arrays.
IEEE Des. Test, 2020

Emerging Neural Workloads and Their Impact on Hardware.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
The Next Generation of Deep Learning Hardware: Analog Computing.
Proc. IEEE, 2019

Neural network accelerator design with resistive crossbars: Opportunities and challenges.
IBM J. Res. Dev., 2019

Algorithm for Training Neural Networks on Resistive Device Arrays.
CoRR, 2019

Zero-shifting Technique for Deep Neural Network Training on Resistive Cross-point Arrays.
CoRR, 2019

Design and Characterization of Superconducting Nanowire-Based Processors for Acceleration of Deep Neural Network Training.
CoRR, 2019

Training large-scale ANNs on simulated resistive crossbar arrays.
CoRR, 2019


2018
Efficient ConvNets for Analog Arrays.
CoRR, 2018

Training LSTM Networks with Resistive Cross-Point Devices.
CoRR, 2018

2017
Training Deep Convolutional Neural Networks with Resistive Cross-Point Devices.
CoRR, 2017

Analog CMOS-based resistive processing unit for deep neural network training.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016
Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices.
CoRR, 2016


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