Yu-Min Lee
Orcid: 0000-0002-4009-924X
According to our database1,
Yu-Min Lee
authored at least 46 papers
between 2001 and 2023.
Collaborative distances:
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Bibliography
2023
IET Comput. Digit. Tech., March, 2023
Chiplet Placement for 2.5D IC with Sequence Pair Based Tree and Thermal Consideration.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
2021
Proceedings of the IEEE International Conference on Consumer Electronics-Taiwan, 2021
2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
Multi-angle bended heat pipe design using x-architecture routing with dynamic thermal weight on mobile devices.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
2014
Proceedings of the International Symposium on Physical Design, 2014
2013
An efficient method for analyzing on-chip thermal reliability considering process variations.
ACM Trans. Design Autom. Electr. Syst., 2013
Power delivery network design for wiring and TSV resource minimization in TSV-based 3-D ICs.
Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013
NUMANA: a hybrid <u>num</u>erical and <u>ana</u>lytical thermal simulator for 3-D ICs.
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013
2012
On-chip statistical hot-spot estimation using mixed-mesh statistical polynomial expression generating and skew-normal based moment matching techniques.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
2010
Statistical electro-thermal analysis with high compatibility of leakage power models.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010
A hierarchical bin-based legalizer for standard-cell designs with minimal disturbance.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
Full-Chip Thermal Analysis for the Early Design Stage via Generalized Integral Transforms.
IEEE Trans. Very Large Scale Integr. Syst., 2009
A multiple supply voltage based power reduction method in 3-D ICs considering process variations and thermal effects.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
Stochastic thermal simulation considering spatial correlated within-die process variations.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
2008
Integrating E-services with a Telecommunication E-commerce using Service-Oriented Architecture.
J. Softw., 2008
Proceedings of the NCM 2008, The Fourth International Conference on Networked Computing and Advanced Information Management, Gyeongju, Korea, September 2-4, 2008, 2008
A Process-Oriented System Dynamics Model for Software Development Project Prediction.
Proceedings of the NCM 2008, The Fourth International Conference on Networked Computing and Advanced Information Management, Gyeongju, Korea, September 2-4, 2008, 2008
Proceedings of the 2008 International Symposium on Computer Science and Computational Technology, 2008
Full-chip thermal analysis for the early design stage via generalized integral transforms.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008
2007
Proceedings of the 2007 IEEE International SOC Conference, 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
2006
Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
2003
The power grid transient simulation in linear time based on 3-D alternating-direction-implicit method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
Steady-state thermal characteristics of AMR read/write heads used in tape storage drives.
IBM J. Res. Dev., 2003
Proceedings of the 2003 International Symposium on Physical Design, 2003
The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method .
Proceedings of the 2003 Design, 2003
A hierarchical analysis methodology for chip-level power delivery with realizable model reduction.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2002
Simultaneous Buffer-sizing and Wire-sizing for Clock Trees Based on Lagrangian Relaxation.
VLSI Design, 2002
Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002
HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery.
Proceedings of the 39th Design Automation Conference, 2002
2001
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001
Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001
Proceedings of ASP-DAC 2001, 2001