Yuhua Liang
Orcid: 0000-0003-1240-2878
According to our database1,
Yuhua Liang
authored at least 45 papers
between 2012 and 2025.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2025
IEEE Trans. Circuits Syst. II Express Briefs, July, 2025
A 20-kHz 106.1-dB SNDR Σ-Δ DAC Using FIA With Dynamic-Body-Biasing-Assisted CLS Technique.
IEEE Trans. Consumer Electron., May, 2025
An 8-to-12-Bit Resolution-Reconfigurable SAR ADC With Fast-Window-Switching Technique.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2025
A 14-Bit 250-KS/s Calibration-Free SAR ADC for the Detection of Physiological Electrical Signals in Consumer Electronics.
IEEE Trans. Consumer Electron., February, 2025
A 10kHz-BW 103.1-dB Max-SNDR Reconfigurable Zoom ADC With Noise-Shaping Effect Enhancement Technique for Biomedical Measurement.
IEEE Trans. Instrum. Meas., 2025
A 16 kHz-BW 93.1 dB-SNDR DT 2-1 MASH ΔΣ ADC With Cascading-CLS Technique for Accelerometer Measurement Applications.
IEEE Trans. Instrum. Meas., 2025
Microelectron. J., 2025
A low-power 18-bit sigma-delta digital-to-analog converter with low-temperature-drift reference.
Microelectron. J., 2025
Microelectron. J., 2025
Microelectron. J., 2025
2024
A Less-Delay and Wide Conversion-Voltage-Range Level Shifter by Using Switched-Capacitor Technique for Power-Efficiency Health Electronics.
IEEE Trans. Consumer Electron., February, 2024
Microelectron. J., January, 2024
Microelectron. J., January, 2024
Microelectron. J., January, 2024
A 10-kHz 12-16-bit reconfigurable zoom ADC with pole optimization technique and floating current-starved amplifier.
Sci. China Inf. Sci., 2024
A 0.64mm<sup>2</sup>Sensor Size, 32.5μg/√Hz Noise Floor, High Efficiency MEMS Capacitive Accelerometer Using High-Voltage Pulse Excitation Technique.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
A Time-Domain Reconfigurable Second-Order Noise Shaping ADC With Single Fan-Out Gated Delay Cells.
IEEE Trans. Very Large Scale Integr. Syst., June, 2023
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2023
Microelectron. J., 2023
A 99.93% energy-efficient switching scheme for SAR ADC without switching energy in the first three MSBs.
Microelectron. J., 2023
Microelectron. J., 2023
Microelectron. J., 2023
Microelectron. J., 2023
2022
A 625kHz-BW, 79.3dB-SNDR Second-Order Noise-Shaping SAR ADC Using High-Efficiency Error-Feedback Structure.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A 14-b 20-MS/s 78.8 dB-SNDR Energy-Efficient SAR ADC With Background Mismatch Calibration and Noise-Reduction Techniques for Portable Medical Ultrasound Systems.
IEEE Trans. Biomed. Circuits Syst., 2022
Microelectron. J., 2022
2021
Microelectron. J., 2021
Microelectron. J., 2021
2020
IEEE Access, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
2018
Microelectron. J., 2018
J. Circuits Syst. Comput., 2018
J. Circuits Syst. Comput., 2018
J. Circuits Syst. Comput., 2018
2017
Microelectron. J., 2017
2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
A 10-bit 300-MS/s asynchronous SAR ADC with strategy of optimizing settling time for capacitive DAC in 65 nm CMOS.
Microelectron. J., 2015
A Gain-Tunable Output Buffer for Audio-DAC with Common-Mode Output Independent of Gain Variation.
J. Circuits Syst. Comput., 2015
Strategy for SAR ADC with 87.5% area saving and 99.4% switching energy reduction over conventional approach.
IEICE Electron. Express, 2015
2012
Synchronization of Non-Identical Unknown Chaotic Delayed Neural Networks Based on Adaptive Sliding Mode Control.
Neural Process. Lett., 2012
Synchronization of chaotic neural networks with time delay in the leakage term and parametric uncertainties based on sampled-data control.
J. Frankl. Inst., 2012