Abbas Sheibanyrad

According to our database, Abbas Sheibanyrad authored at least 14 papers between 2006 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

A 4 × 4 × 2 Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links.

Pascal Vivet, Yvain Thonnart, Romain Lemaire, Cristiano Santos, Edith Beigné, Christian Bernard, Florian Darve, Didier Lattard, Ivan Miro Panades, Denis Dutoit, Fabien Clermidy, Séverine Cheramy, Abbas Sheibanyrad, Frédéric Pétrot, Eric Flamand, Jean Michailos, Alexandre Arriordaz, Lee Wang, Juergen Schloeffel

IEEE J. Solid State Circuits, 2017

A Distributed NUCA Architecture Using an Efficient NoC Multicasting Support.

Hela Belhadj Amor, Abbas Sheibanyrad, Frédéric Pétrot

Proceedings of the Euromicro Conference on Digital System Design, 2017

2014

Assignment of Vertical-Links to Routers in Vertically-Partially-Connected 3-D-NoCs.

Sahar Foroutan, Abbas Sheibanyrad, Frédéric Pétrot

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

2013

Elevator-First: A Deadlock-Free Distributed Routing Algorithm for Vertically Partially Connected 3D-NoCs.

Florentine Dubois, Abbas Sheibanyrad, Frédéric Pétrot, Maryam Bahmani

IEEE Trans. Computers, 2013

2012

A 3D-NoC Router Implementation Exploiting Vertically-Partially-Connected Topologies.

Maryam Bahmani, Abbas Sheibanyrad, Frédéric Pétrot, Florentine Dubois, Paolo Durante

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

Cost-efficient buffer sizing in shared-memory 3D-MPSoCs using wide I/O interfaces.

Sahar Foroutan, Abbas Sheibanyrad, Frédéric Pétrot

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Asynchronous 3D-NoCs Making Use of Serialized Vertical Links.

Abbas Sheibanyrad, Frédéric Pétrot

Proceedings of the 3D Integration for NoC-based SoC Architectures, 2011

Physical Implementation of an Asynchronous 3D-NoC Router Using Serial Vertical Links.

Florian Darve, Abbas Sheibanyrad, Pascal Vivet, Frédéric Pétrot

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

2008

Two efficient synchronous <--> asynchronous converters well-suited for networks-on-chip in GALS architectures.

Abbas Sheibanyrad, Alain Greiner

Integr., 2008

Multisynchronous and Fully Asynchronous NoCs for GALS Architectures.

Abbas Sheibanyrad, Alain Greiner, Ivan Miro Panades

IEEE Des. Test Comput., 2008

2007

Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture.

Abbas Sheibanyrad, Ivan Miro Panades, Alain Greiner

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Hybrid-Timing FIFOs to Use on Networks-on-Chip in GALS Architectures.

Abbas Sheibanyrad, Alain Greiner

Proceedings of the 2007 International Conference on Embedded Systems & Applications, 2007

2006

Two Efficient Synchronous Û Asynchronous Converters Well-Suited for Network on Chip in GALS Architectures.

Abbas Sheibanyrad, Alain Greiner

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

A Low Cost Network-on-Chip with Guaranteed Service Well Suited to the GALS Approach.

Ivan Miro Panades, Alain Greiner, Abbas Sheibanyrad

Proceedings of the 1st International ICST Conference on Nano-Networks, 2006