Adriel Ziesemer

According to our database, Adriel Ziesemer authored at least 15 papers between 2007 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

Toward better layout design in ASTRAN CAD tool by using an efficient transistor folding.

Gustavo H. Smaniotto, Matheus T. Moreira, Adriel Mota Ziesemer, Felipe S. Marques, Leomar S. da Rosa

Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Optimizing cell area by applying an alternative transistor folding technique in an open source physical synthesis CAD tool.

Gustavo H. Smaniotto, Joao Junior da Silva Machado, Matheus T. Moreira, Adriel Mota Ziesemer, Felipe S. Marques, Leomar S. da Rosa Jr.

Proceedings of the IEEE 7th Latin American Symposium on Circuits & Systems, 2016

2014

Automatic layout synthesis of transistor networks.

Adriel Mota Ziesemer

PhD thesis, 2014

Automated Synthesis of Cell Libraries for Asynchronous Circuits.

Matheus Trevisan, Michel Evandro Arendt, Adriel Ziesemer, Ricardo Augusto da Luz Reis, Ney Laert Vilar Calazans

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

Automatic layout synthesis with ASTRAN applied to asynchronous cells.

Adriel Ziesemer, Ricardo Reis, Matheus T. Moreira, Michel Evandro Arendt, Ney Laert Vilar Calazans

Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

Simultaneous Two-Dimensional Cell Layout Compaction Using MILP with ASTRAN.

Adriel Mota Ziesemer, Ricardo Augusto da Luz Reis

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

A design flow for physical synthesis of digital cells with ASTRAN.

Adriel Ziesemer, Ricardo Reis, Matheus T. Moreira, Michel Evandro Arendt, Ney Laert Vilar Calazans

Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2010

Low-sensitivity to process variations aging sensor for automotive safety-critical applications.

Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel Maria Cacho Teixeira, Marcelino B. Santos, João Paulo Teixeira

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

Predictive error detection by on-line aging monitoring.

Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira

Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

A study on layout quality of automatic generated cells.

Gracieli Posser, Adriel Ziesemer, Daniel Guimares Jr., Gustavo Wilke, Ricardo A. L. Reis

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

Built-in aging monitoring for safety-critical applications.

Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira

Proceedings of the 15th IEEE International On-Line Testing Symposium (IOLTS 2009), 2009

An automated design methodology for layout generation targeting power leakage minimization.

Cristiano Lazzari, Adriel Ziesemer, Ricardo Reis

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2007

Transistor level automatic layout generator for non-complementary CMOS cells.

Adriel Ziesemer, Cristiano Lazzari

Proceedings of the IFIP VLSI-SoC 2007, 2007

Efficient timing closure with a transistor level design flow.

Cristiano Lazzari, Cristiano Santos, Adriel Ziesemer, Lorena Anghel, Ricardo Reis

Proceedings of the IFIP VLSI-SoC 2007, 2007

An Educational Tool for Design Automation of CMOS Cells.

Adriel Ziesemer, Cristiano Lazzari, Ricardo Reis

Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007