Cristiano Lazzari

According to our database, Cristiano Lazzari authored at least 29 papers between 2003 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2013

Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool.

Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro

IEEE Trans. Very Large Scale Integr. Syst., 2013

Evaluating the scalability of test buses.

Alexandre M. Amory, Matheus T. Moreira, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Cristiano Lazzari, Marcelo Soares Lubaszewski

Proceedings of the 2013 International Symposium on System on Chip, 2013

2012

High-level algorithms for the optimization of gate-level area in digit-serial multiple constant multiplications.

Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro

Integr., 2012

2011

A new test scheduling algorithm based on Networks-on-Chip as Test Access Mechanisms.

Alexandre M. Amory, Cristiano Lazzari, Marcelo Lubaszewski, Fernando Gehm Moraes

J. Parallel Distributed Comput., 2011

Low Power Multiple-Value Voltage-Mode Look-Up Table for Quaternary Field Programmable Gate Arrays.

Cristiano Lazzari, Jorge R. Fernandes, Paulo F. Flores, José Monteiro

J. Low Power Electron., 2011

Early estimation of wire length for dedicated test access mechanisms in networks-on-chip based SoCs.

Alexandre M. Amory, Cristiano Lazzari, Marcelo Lubaszewski, Fernando Gehm Moraes

Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

Optimization of area in digit-serial Multiple Constant Multiplications at gate-level.

Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Efficient shift-adds design of digit-serial multiple constant multiplications.

Levent Aksoy, Cristiano Lazzari, Eduardo Costa, Paulo F. Flores, José Monteiro

Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2010

An Efficient Low Power Multiple-Value Look-Up Table Targeting Quaternary FPGAs.

Cristiano Lazzari, Jorge R. Fernandes, Paulo F. Flores, José Monteiro

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010

Voltage-mode quaternary FPGAs: An evaluation of interconnections.

Cristiano Lazzari, Paulo F. Flores, José Monteiro, Luigi Carro

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach.

Sidinei Ghissoni, Eduardo Costa, Cristiano Lazzari, José Monteiro, Levent Aksoy, Ricardo Reis

Proceedings of the 17th IEEE International Conference on Electronics, 2010

A Cost-Effective Technique for Mapping BLUTs to QLUTs in FPGAs.

Marcus Ritt, Carlos Arthur Lang Lisbôa, Luigi Carro, Cristiano Lazzari

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

A new quaternary FPGA based on a voltage-mode multi-valued circuit.

Cristiano Lazzari, Paulo F. Flores, José Monteiro, Luigi Carro

Proceedings of the Design, Automation and Test in Europe, 2010

2009

CMOS voltage-mode quaternary look-up tables for multi-valued FPGAs.

Ricardo C. Goncalves da Silva, Cristiano Lazzari, Henri Boudinov, Luigi Carro

Microelectron. J., 2009

An automated design methodology for layout generation targeting power leakage minimization.

Cristiano Lazzari, Adriel Ziesemer, Ricardo Reis

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2007

A Case Study on Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis.

Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel

J. Electron. Test., 2007

Transistor level automatic layout generator for non-complementary CMOS cells.

Adriel Ziesemer, Cristiano Lazzari

Proceedings of the IFIP VLSI-SoC 2007, 2007

Efficient timing closure with a transistor level design flow.

Cristiano Lazzari, Cristiano Santos, Adriel Ziesemer, Lorena Anghel, Ricardo Reis

Proceedings of the IFIP VLSI-SoC 2007, 2007

An Educational Tool for Design Automation of CMOS Cells.

Adriel Ziesemer, Cristiano Lazzari, Ricardo Reis

Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

2006

Multiple Defect Tolerant Devices for Unreliable Future Nanotechnologies.

Lorena Anghel, Cristiano Lazzari, Michael Nicolaidis

Proceedings of the 7th Latin American Test Workshop, 2006

Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis: A Case Study.

Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

A New Transistor-Level Layout Generation Strategy for Static CMOS Circuits.

Cristiano Lazzari, Cristiano Santos, Ricardo Reis

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

A Transistor Placement Technique Using Genetic Algorithm and Analytical Programming.

Cristiano Lazzari, Lorena Anghel, Ricardo Reis

Proceedings of the VLSI-SoC: From Systems To Silicon, 2005

On Implementing a Soft Error Hardening Technique by Using an Automatic Layout Generator: Case Study.

Cristiano Lazzari, Lorena Anghel, Ricardo A. L. Reis

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

2004

A New Transistor Folding Algorithm Applied to an Automatic Full-Custom Layout Generation Tool.

Fabricio B. Bastian, Cristiano Lazzari, José Luís Almada Güntzel, Ricardo Reis

Proceedings of the Integrated Circuit and System Design, 2004

Automatic Full-Custom Layout Generation of Static CMOS Circuits Targeting Delay and Power Reduction.

Cristiano Lazzari

Proceedings of the Student Forum, 2004

2003

A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits.

Cristiano Lazzari, Cristiano Viana Domingues, José Luís Güntzel, Ricardo Reis

Proceedings of the VLSI-SOC: From Systems to Chips, 2003

A New Macro-cell Generation Strategy for three metal layer CMOS Technologies.

Cristiano Lazzari, Cristiano Viana Domingues, José Luís Almada Güntzel, Ricardo Augusto da Luz Reis

Proceedings of the IFIP VLSI-SoC 2003, 2003

A Transistor Sizing Method Applied to an Automatic Layout Generation Tool.

Cristiano Santos, Gustavo Wilke, Cristiano Lazzari, Ricardo Reis, José Luís Almada Güntzel

Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003