Ajay Kapoor

According to our database1, Ajay Kapoor authored at least 25 papers between 2009 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
NeuronFlow: a neuromorphic processor architecture for Live AI applications.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

NeuronFlow: A Hybrid Neuromorphic - Dataflow Processor Architecture for AI Workloads.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2017
Logic Design Partitioning for Stacked Power Domains.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Low-Power Microcontroller in a 40-nm CMOS Using Charge Recycling.
IEEE J. Solid State Circuits, 2017

Neural network based computational model for estimation of heat generation in LiFePO<sub>4</sub> pouch cells of different nominal capacities.
Comput. Chem. Eng., 2017

Floorplan and placement methodology for improved energy reduction in stacked power-domain design.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Robust Adaptive Sliding-Mode Observer Using RBF Neural Network for Lithium-Ion Battery State of Charge Estimation in Electric Vehicles.
IEEE Trans. Veh. Technol., 2016

A microcontroller with 96% power-conversion efficiency using stacked voltage domains.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Leakage mitigation for low power microcontroller design in 40nm for Internet-of-Things (IoT).
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

Lower power by voltage stacking: a fine-grained system design approach.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
Intelligent Sensorless Antilock Braking System for Brushless In-Wheel Electric Vehicles.
IEEE Trans. Ind. Electron., 2015

A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers.
Microprocess. Microsystems, 2015

HCI Methods for Empowering Discussion on Person-Centered Fall Prevention with Older Adults.
Proceedings of the Annual Meeting of the Australian Special Interest Group for Computer Human Interaction, 2015

2014
Intelligent Sensorless ABS for In-Wheel Electric Vehicles.
IEEE Trans. Ind. Electron., 2014

Digital Systems Power Management for High Performance Mixed Signal Platforms.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Adaptive gain sliding mode observer for state of charge estimation based on combined battery equivalent circuit model.
Comput. Chem. Eng., 2014

2013
Architectural Analysis for Wirelessly Powered Computing Platforms.
IEEE Trans. Very Large Scale Integr. Syst., 2013

A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain using Carry-Save format numbers.
Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013

Enhanced ABS for In-Wheel Electric Vehicles using data fusion.
Proceedings of the 2013 IEEE Intelligent Vehicles Symposium (IV), 2013

2012
Accurate wheel speed measurement for sensorless ABS in electric vehicle.
Proceedings of the IEEE International Conference on Vehicular Electronics and Safety, 2012

Experimental comparison of charging algorithms for a lithium-ion battery.
Proceedings of the IEEE Asian Solid State Circuits Conference, 2012

An overview of lithium-ion batteries for electric vehicles.
Proceedings of the IEEE Asian Solid State Circuits Conference, 2012

2010
Ultra-Low-Power Digital Design with Body Biasing for Low Area and Performance-Efficient Operation.
J. Low Power Electron., 2010

2009
A 65 nm CMOS Inductorless Triple Band Group WiMedia UWB PHY.
IEEE J. Solid State Circuits, 2009

A 65nm CMOS inductorless triple-band-group WiMedia UWB PHY.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009


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