Austin Rovinski

According to our database, Austin Rovinski authored at least 17 papers between 2015 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Optically Connected Multi-Stack HBM Modules for Large Language Model Training and Inference.

Yanghui Ou, Hengrui Zhang, Austin Rovinski, David Wentzlaff, Christopher Batten

IEEE Comput. Archit. Lett., 2025

Scaling Co-Packaged Optical Interconnects Using Hybrid 2.5D/3D Integration.

Austin Rovinski, Yanghui Ou, Christine Ou, Devesh Khilwani, Yuyang Wang, Songli Wang, Sunwoo Lee, Keren Bergman, Alyosha C. Molnar, Christopher Batten

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024

EDA Corpus: A Large Language Model Dataset for Enhanced Interaction with OpenROAD.

Bing-Yue Wu, Utsav Sharma, Sai Rahul Dhanvi Kankipati, Ajay Yadav, Bintu Kappil George, Sai Ritish Guntupalli, Austin Rovinski, Vidya A. Chhabria

CoRR, 2024

OpenROAD-Assistant: An Open-Source Large Language Model for Physical Design Tasks.

Utsav Sharma, Bing-Yue Wu, Sai Rahul Dhanvi Kankipati, Vidya A. Chhabria, Austin Rovinski

Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, 2024

Generative Methods in EDA: Innovations in Dataset Generation and EDA Tool Assistants.

Vidya A. Chhabria, Bing-Yue Wu, Utsav Sharma, Kishor Kunal, Austin Rovinski, Sachin S. Sapatnekar

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

2022

Towards Free, Open, and Ubiquitous Hardware Design

Austin Rovinski

PhD thesis, 2022

2020

A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator.

Dong-Hyeon Park, Subhankar Pal, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael Bedford Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski

IEEE J. Solid State Circuits, 2020

Sparse-TPU: adapting systolic arrays for sparse matrices.

Xin He, Subhankar Pal, Aporva Amarnath, Siying Feng, Dong-Hyeon Park, Austin Rovinski, Haojie Ye, Kuan-Yu Chen, Ronald G. Dreslinski, Trevor N. Mudge

Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020

Bridging Academic Open-Source EDA to Real-World Usability.

Austin Rovinski, Tutu Ajayi, Minsoo Kim, Guanru Wang, Mehdi Saligane

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019

A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS.

Austin Rovinski, Chun Zhao, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang, Ian Galton, Christopher Batten, Michael B. Taylor, Ronald G. Dreslinski

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm.

Subhankar Pal, Dong-Hyeon Park, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael B. Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2018

The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips.

Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald G. Dreslinski, Christopher Batten, Michael B. Taylor

IEEE Micro, 2018

2017

A carbon nanotube transistor based RISC-V processor using pass transistor logic.

Aporva Amarnath, Siying Feng, Subhankar Pal, Tutu Ajayi, Austin Rovinski, Ronald G. Dreslinski

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

Neurosurgeon: Collaborative Intelligence Between the Cloud and Mobile Edge.

Yiping Kang, Johann Hauswald, Cao Gao, Austin Rovinski, Trevor N. Mudge, Jason Mars, Lingjia Tang

Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems, 2017

2016

Designing Future Warehouse-Scale Computers for Sirius, an End-to-End Voice and Vision Personal Assistant.

Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Hailong Yang, Yiping Kang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars

ACM Trans. Comput. Syst., 2016

Sirius Implications for Future Warehouse-Scale Computers.

Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars

IEEE Micro, 2016

2015

Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers.

Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars

Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015