Mehdi Saligane
According to our database1,
Mehdi Saligane
authored at least 20 papers
between 2015 and 2021.
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Bibliography
2021
Design Techniques of Integrated Power Management Circuits for Low Power Edge Devices.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
A Self-Tuning IoT Processor Using Leakage-Ratio Measurement for Energy-Optimal Operation.
IEEE J. Solid State Circuits, 2020
Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation.
Proceedings of the VLSI-SoC: Design Trends, 2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
The Missing Pieces of Open Design Enablement: A Recent History of Google Efforts : lnvited Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
2019
A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT Variation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
iRazor: Current-Based Error Detection and Correction Scheme for PVT Variation in 40-nm ARM Cortex-R4 Processor.
IEEE J. Solid State Circuits, 2018
A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles.
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
An Adaptive Body-Biaslna SoC Using in Situ Slack Monitoring for Runtime Replica Calibration.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
A 224 PW 260 PPM/°C Gate-Leakage-Based Timer for Ultra-Low Power Sensor Nodes with Second-Order Temperature Dependency Cancellation.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
A 0.04MM<sup>3</sup>16NW Wireless and Batteryless Sensor System with Integrated Cortex-M0+ Processor and Optical Communication for Cellular Temperature Measurement.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
2017
3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2016
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
8.8 iRazor: 3-transistor current-based error detection and correction in an ARM Cortex-R4 processor.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
17.3 A reconfigurable dual-port memory with error detection and correction in 28nm FDSOI.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasing.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
All-digital SoC thermal sensor using on-chip high order temperature curvature correction.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015