Azita Emami-Neyestanak

Orcid: 0000-0002-6945-9958

Affiliations:
  • California Institute of Technology, Pasadena, USA


According to our database1, Azita Emami-Neyestanak authored at least 58 papers between 2007 and 2023.

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Bibliography

2023
A 65-nm CMOS Fluorescence Sensor for Dynamic Monitoring of Living Cells.
IEEE J. Solid State Circuits, November, 2023

A 100-Gb/s PAM4 Optical Transmitter in a 3-D-Integrated SiPh-CMOS Platform Using Segmented MOSCAP Modulators.
IEEE J. Solid State Circuits, 2023

A 200Gb/s QAM-16 Silicon Photonic Transmitter with 4 Binary-Driven EAMs in An MZI Structure.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023

A 65nm CMOS Living-Cell Dynamic Fluorescence Sensor with 1.05fA Sensitivity at 600/700nm Wavelengths.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A Monolithic 3D Magnetic Sensor in 65nm CMOS with rms Noise and 14.8μW Power.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

EKGNet: A 10.96μW Fully Analog Neural Network for Intra-Patient Arrhythmia Classification.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022
A 16-Channel Neural Recording System-on-Chip With CHT Feature Extraction Processor in 65-nm CMOS.
IEEE J. Solid State Circuits, 2022

A 2.4pJ/b 100Gb/s 3D-integrated PAM-4 Optical Transmitter with Segmented SiP MOSCAP Modulators and a 2-Channel 28nm CMOS Driver.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
Wireless 3D Surgical Navigation and Tracking System With 100μm Accuracy Using Magnetic-Field Gradient-Based Localization.
IEEE Trans. Medical Imaging, 2021

A Biofuel-Cell-Based Energy Harvester With 86% Peak Efficiency and 0.25-V Minimum Input Voltage Using Source-Adaptive MPPT.
IEEE J. Solid State Circuits, 2021

A 60-Gb/s PAM4 Wireline Receiver With 2-Tap Direct Decision Feedback Equalization Employing Track-and-Regenerate Slicers in 28-nm CMOS.
IEEE J. Solid State Circuits, 2021

A 16-Channel Wireless Neural Recording System-on-Chip with CHT Feature Extraction Processor in 65nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020
20.4 3D Surgical Alignment with 100µm Resolution Using Magnetic-Field Gradient-Based Localization.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

A Fully-Integrated Biofuel-Cell-Based Energy Harvester with 86% Peak Efficiency and 0.25V Minimum Input Voltage Using Source-Adaptive MPPT.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
A 25-Gb/s Avalanche Photodetector-Based Burst-Mode Optical Receiver With 2.24-ns Reconfiguration Time in 28-nm CMOS.
IEEE J. Solid State Circuits, 2019

Deep Multi-State Dynamic Recurrent Neural Networks Operating on Wavelet Based Neural Features for Robust Brain Machine Interfaces.
Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019

Decoding Kinematics from Human Parietal Cortex using Neural Networks.
Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019

High-Speed Optical Links.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018
Energy-Efficient Classification for Resource-Constrained Biomedical Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

F5: Advanced optical communication: From devices, circuits, and architectures to algorithms.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Session 16 overview: Advanced optical and wireline techniques: Wireline subcommittee.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Towards Adaptive Deep Brain Stimulation in Parkinson'S Disease: Lfp-Based Feature Analysis and Classification.
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018

A 41.2 nJ/class, 32-Channel On-Chip Classifier for Epileptic Seizure Detection.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

A 25Gb/s APD-based burst-mode optical receiver with 2.24ns reconfiguration time in 28nm CMOS.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

A wireless, low-drift, implantable intraocular pressure sensor with parylene-on-oil encapsulation.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
Optical interconnects: Design and analysis.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017

2016
A Wideband Injection Locked Quadrature Clock Generation and Distribution Technique for an Energy-Proportional 16-32 Gb/s Optical Receiver in 28 nm FDSOI CMOS.
IEEE J. Solid State Circuits, 2016

A Modelling and Nonlinear Equalization Technique for a 20 Gb/s 0.77 pJ/b VCSEL Transmitter in 32 nm SOI CMOS.
IEEE J. Solid State Circuits, 2016

New Associate Editor.
IEEE J. Solid State Circuits, 2016

A 16-channel 1.1mm<sup>2</sup> implantable seizure control SoC with sub-μW/channel consumption and closed-loop stimulation in 0.18µm CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

A 10Gb/s, 342fJ/bit micro-ring modulator transmitter with switched-capacitor pre-emphasis and monolithic temperature sensor in 65nm CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Hardware-friendly seizure detection with a boosted ensemble of shallow decision trees.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

2015
An 8 GHz First-Order Frequency Synthesizer for Low-Power On-Chip Clock Generation.
IEEE J. Solid State Circuits, 2015

Capacitive Proximity Communication With Distributed Alignment Sensing for Origami Biomedical Implants.
IEEE J. Solid State Circuits, 2015

22.3 A 4-to-11GHz injection-locked quarter-rate clocking for an adaptive 153fJ/b optical receiver in 28nm FDSOI CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Session 22 overview: High-speed optical links: Wireline subcommittee.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Silicon-photonic PTAT temperature sensor for micro-ring resonator thermal stabilization.
Proceedings of the European Conference on Optical Communication, 2015

Differential optical ring modulator: Breaking the bandwidth/quality-factor trade-off.
Proceedings of the European Conference on Optical Communication, 2015

A 20Gb/s 0.77pJ/b VCSEL transmitter with nonlinear equalization in 32nm SOI CMOS.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
An 8GHz first-order frequency synthesizer based on phase interpolation and quadrature frequency detection in 65nm CMOS.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

Wireline transceivers.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

Design considerations for high-density fully intraocular epiretinal prostheses.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

2013
A Fully Intraocular High-Density Self-Calibrating Epiretinal Prosthesis.
IEEE Trans. Biomed. Circuits Syst., 2013

A 24-Gb/s Double-Sampling Receiver for Ultra-Low-Power Optical Communication.
IEEE J. Solid State Circuits, 2013

A fully intraocular 0.0169mm<sup>2</sup>/pixel 512-channel self-calibrating epiretinal prosthesis in 65nm CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

F3: Emerging technologies for wireline communication.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 15-Gb/s 0.5-mW/Gbps Two-Tap DFE Receiver With Far-End Crosstalk Cancellation.
IEEE J. Solid State Circuits, 2012

A 3x9 Gb/s Shared, All-Digital CDR for High-Speed, High-Density I/O.
IEEE J. Solid State Circuits, 2012

A Compressed Sensing Parameter Extraction Platform for Radar Pulse Signal Acquisition.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

A Nonuniform Sampler for Wideband Spectrally-Sparse Environments.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

An 18.6Gb/s double-sampling receiver in 65nm CMOS for ultra-low-power optical communication.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

An analog sub-linear time sparse signal acquisition framework based on structured matrices.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Design and implementation of a fully integrated compressed-sensing signal acquisition system.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

2011
A 15Gb/s 0.5mW/Gb/s 2-tap DFE receiver with far-end crosstalk cancellation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2008
A 90 nm CMOS 16 Gb/s Transceiver for Optical Interconnects.
IEEE J. Solid State Circuits, 2008

2007
A 6.0-mW 10.0-Gb/s Receiver With Switched-Capacitor Summation DFE.
IEEE J. Solid State Circuits, 2007

A 90nm CMOS 16Gb/s Transceiver for Optical Interconnects.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Tertiary-Tree 12-GHz 32-bit Adder in 65nm Technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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