Babar A. Khan
Affiliations:- IBM Systems and Technology Group, Poughkeepsie, NY, USA
- Massachusetts Institute of Technology, Cambridge, MA, USA (PhD 1984)
According to our database1,
Babar A. Khan
authored at least 4 papers
between 2005 and 2016.
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Bibliography
2016
IEEE J. Solid State Circuits, 2016
2008
A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier.
IEEE J. Solid State Circuits, 2008
2007
A 500MHz Random Cycle 1.5ns-Latency, SOI Embedded DRAM Macro Featuring a 3T Micro Sense Amplifier.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
2005
IEEE J. Solid State Circuits, 2005