Abraham Mathews

According to our database1, Abraham Mathews authored at least 5 papers between 2009 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
A 14 nm 1.1 Mb Embedded DRAM Macro With 1 ns Access.
IEEE J. Solid State Circuits, 2016

2015
17.4 A 14nm 1.1Mb embedded DRAM macro with 1ns access.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2011
A 45 nm SOI Embedded DRAM Macro for the POWER™ Processor 32 MByte On-Chip L3 Cache.
IEEE J. Solid State Circuits, 2011

2010
A 45nm SOI embedded DRAM macro for POWER7TM 32MB on-chip L3 cache.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
A 1 MB Cache Subsystem Prototype With 1.8 ns Embedded DRAMs in 45 nm SOI CMOS.
IEEE J. Solid State Circuits, 2009


  Loading...