Bert Moons

According to our database, Bert Moons authored at least 20 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge.

Pascal Alexander Hager, Bert Moons, Stefan Cosemans, Ioannis A. Papistas, Bram Rooseleer, Jeroen Van Loon, Roel Uytterhoeven, Florian Zaruba, Spyridoula Koumousi, Milos Stanisavljevic, Stefan Mach, Sebastiaan Mutsaards, Riduan Khaddam Aljameh, Gua Hao Khov, Brecht Machiels, Cristian Olar, Anastasios Psarras, Sander Geursen, Jeroen Vermeeren, Yi Lu, Abhishek Maringanti, Deepak Ameta, Leonidas Katselas, Noah Hütter, Manuel Schmuck, Swetha Sivadas, Karishma Sharma, Manuel Oliveira, Ramon Aerne, Nitish Sharma, Timir Soni, Beatrice Bussolino, Djordje Pesut, Michele Pallaro, Andrei Podlesnii, Alexios Lyrakis, Yannick Ruffiner, Martino Dazzi, Johannes Thiele, Koen Goetschalckx, Nazareno Bruschi, Jonas Doevenspeck, Bram Verhoef, Stefan Linz, Giuseppe Garcea, Jonathan Ferguson, Ioannis Koltsidas, Evangelos Eleftheriou

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

Differentiable Transportation Pruning.

Yunqiang Li, Jan C. van Gemert, Torsten Hoefler, Bert Moons, Evangelos Eleftheriou, Bram-Ernst Verhoef

Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

2021

Distilling Optimal Neural Networks: Rapid Search in Diverse Spaces.

Bert Moons, Parham Noorzad, Andrii Skliar, Giovanni Mariani, Dushyant Mehta, Chris Lott, Tijmen Blankevoort

Proceedings of the 2021 IEEE/CVF International Conference on Computer Vision, 2021

2019

An Always-On 3.8 $\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS.

Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst, Boris Murmann

IEEE J. Solid State Circuits, 2019

2018

Optimized Hierarchical Cascaded Processing.

Koen Goetschalckx, Bert Moons, Steven Lauwereins, Martin Andraud, Marian Verhelst

IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Resource aware design of a deep convolutional-recurrent neural network for speech recognition through audio-visual sensor fusion.

Matthijs Van Keirsbilck, Bert Moons, Marian Verhelst

CoRR, 2018

Efficiently Combining SVD, Pruning, Clustering and Retraining for Enhanced Neural Network Compression.

Koen Goetschalckx, Bert Moons, Patrick Wambacq, Marian Verhelst

Proceedings of the 2nd International Workshop on Embedded and Mobile Deep Learning, 2018

An always-on 3.8μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS.

Daniel Bankman, Lita Yang, Bert Moons, Marian Verhelst, Boris Murmann

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Bit Error Tolerance of a CIFAR-10 Binarized Convolutional Neural Network Processor.

Lita Yang, Daniel Bankman, Bert Moons, Marian Verhelst, Boris Murmann

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs.

Gage Hills, Daniel Bankman, Bert Moons, Lita Yang, Jake Hillard, Alex Kahng, Rebecca Park, Marian Verhelst, Boris Murmann, Max M. Shulaker, H.-S. Philip Wong, Subhasish Mitra

Proceedings of the 55th Annual Design Automation Conference, 2018

BinarEye: An always-on energy-accuracy-scalable binary CNN processor with all memory on chip in 28nm CMOS.

Bert Moons, Daniel Bankman, Lita Yang, Boris Murmann, Marian Verhelst

Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017

An Energy-Efficient Precision-Scalable ConvNet Processor in 40-nm CMOS.

Bert Moons, Marian Verhelst

IEEE J. Solid State Circuits, 2017

14.5 Envision: A 0.26-to-10TOPS/W subword-parallel dynamic-voltage-accuracy-frequency-scalable Convolutional Neural Network processor in 28nm FDSOI.

Bert Moons, Roel Uytterhoeven, Wim Dehaene, Marian Verhelst

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

DVAFS: Trading computational accuracy for energy through dynamic-voltage-accuracy-frequency-scaling.

Bert Moons, Roel Uytterhoeven, Wim Dehaene, Marian Verhelst

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Minimum energy quantized neural networks.

Bert Moons, Koen Goetschalckx, Nick Van Berckelaer, Marian Verhelst

Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

2016

Energy-efficient ConvNets through approximate computing.

Bert Moons, Bert De Brabandere, Luc Van Gool, Marian Verhelst

Proceedings of the 2016 IEEE Winter Conference on Applications of Computer Vision, 2016

A 0.3-2.6 TOPS/W precision-scalable processor for real-time large-scale ConvNets.

Bert Moons, Marian Verhelst

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015

DVAS: Dynamic Voltage Accuracy Scaling for increased energy-efficiency in approximate computing.

Bert Moons, Marian Verhelst

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

2014

Energy-Efficiency and Accuracy of Stochastic Computing Circuits in Emerging Technologies.

Bert Moons, Marian Verhelst

IEEE J. Emerg. Sel. Topics Circuits Syst., 2014

Energy and accuracy in multi-stage stochastic computing.

Bert Moons, Marian Verhelst

Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014