Byron Krauter

According to our database, Byron Krauter authored at least 26 papers between 1993 and 2005.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2005

Modeling and Design of Chip-Package Interface.

Anirudh Devgan, Luca Daniel, Byron Krauter, Lei He

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

A noise-driven effective capacitance method with fast embedded noise rule calculation for functional noise analysis.

Haihua Su, David Widiger, Chandramouli V. Kashyap, Frank Liu, Byron Krauter

Proceedings of the 42nd Design Automation Conference, 2005

Spatially distributed 3D circuit models.

Michael W. Beattie, Hui Zheng, Anirudh Devgan, Byron Krauter

Proceedings of the 42nd Design Automation Conference, 2005

2003

Electrical Modeling of Integrated-Package Power and Ground Distributions.

Hui Zheng, Byron Krauter, Lawrence T. Pileggi

IEEE Des. Test Comput., 2003

Realizable reduction of RLC circuits using node elimination.

Masud H. Chowdhury, Chirayu S. Amin, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

On-package decoupling optimization with package macromodels.

Hui Zheng, Byron Krauter, Lawrence T. Pileggi

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

A comprehensive 2-D inductance modeling approach for VLSI interconnects: frequency-dependent extraction and compact circuit model synthesis.

Gerard V. Kopcsay, Byron Krauter, David Widiger, Alina Deutsch, Barry J. Rubin, Howard H. Smith

IEEE Trans. Very Large Scale Integr. Syst., 2002

Guest editorial: special issue on on-chip inductance in high-speed integrated circuits.

Yehea I. Ismail, Byron Krauter

IEEE Trans. Very Large Scale Integr. Syst., 2002

The circuit and physical design of the POWER4 microprocessor.

James D. Warnock, John M. Keaty, John G. Petrovick, Joachim G. Clabes, Charles J. Kircher, Byron Krauter, Phillip J. Restle, Brian A. Zoric, Carl J. Anderson

IBM J. Res. Dev., 2002

Performance analysis of deep sub micron VLSI circuits in the presence of self and mutual inductance.

Masud H. Chowdhury, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Window-Based Susceptance Models for Large-Scale RLC Circuit Analyses.

Hui Zheng, Lawrence T. Pileggi, Michael W. Beattie, Byron Krauter

Proceedings of the 2002 Design, 2002

Variable frequency crosstalk noise analysis: : a methodology to guarantee functionality from dc to fmax.

Byron Krauter, David Widiger

Proceedings of the 39th Design Automation Conference, 2002

2001

Equipotential shells for efficient inductance extraction.

Michael W. Beattie, Byron Krauter, Lale Alatan, Lawrence T. Pileggi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

On-chip wiring design challenges for gigahertz operation.

Alina Deutsch, Paul W. Coteus, Gerard V. Kopcsay, Howard H. Smith, Christopher W. Surovic, Byron Krauter, Daniel C. Edelstein, Phillip J. Restle

Proc. IEEE, 2001

A clock distribution network for microprocessors.

Phillip J. Restle, Timothy G. McNamara, David A. Webber, Peter J. Camporese, Kwok F. Eng, Keith A. Jenkins, David H. Allen, Michael J. Rohn, Michael P. Quaranta, David W. Boerstler, Charles J. Alpert, Craig A. Carter, Roger N. Bailey, John G. Petrovick, Byron L. Krauter, Bradley D. McCredie

IEEE J. Solid State Circuits, 2001

R(f)L(f)C coupled noise evaluation of an S/390 microprocessor chip.

Howard H. Smith, Aline Deutsch, Sharad Mehrotra, David Widiger, Michael A. Bowen, Allan H. Dansky, Gerard V. Kopcsay, Byron Krauter

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000

A realizable driving point model for on-chip interconnect with inductance.

Chandramouli V. Kashyap, Byron Krauter

Proceedings of the 37th Conference on Design Automation, 2000

1999

Including inductive effects in interconnect timing analysis.

Byron Krauter, Sharad Mehrotra, V. Chandramouli

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1998

Layout Based Frequency Dependent Inductance and Resistance Extraction for On-Chip Interconnect Timing Analysis.

Byron Krauter, Sharad Mehrotra

Proceedings of the 35th Conference on Design Automation, 1998

1997

Transmission line synthesis via constrained multivariable optimization.

Rohini Gupta, Byron Krauter, Lawrence T. Pileggi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996

On Moment-Based Metric for Optimal Termination of Transmission Line Interconnects.

Rohini Gupta, Byron Krauter, Lawrence T. Pileggi

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

A Sparse Image Method for BEM Capacitance Extraction.

Byron Krauter, Yu Xia, E. Aykut Dengi, Lawrence T. Pileggi

Proceedings of the 33st Conference on Design Automation, 1996

1995

Generating sparse partial inductance matrices with guaranteed stability.

Byron Krauter, Lawrence T. Pileggi

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Transmission Line Synthesis.

Byron Krauter, Rohini Gupta, John Willis, Lawrence T. Pileggi

Proceedings of the 32st Conference on Design Automation, 1995

The Elmore Delay as a Bound for RC Trees with Generalized Input Signals.

Rohini Gupta, Byron Krauter, Bogdan Tutuianu, John Willis, Lawrence T. Pileggi

Proceedings of the 32st Conference on Design Automation, 1995

1993

An efficient methodology for extraction and simulation of transmission lines for application specific electronic modules.

S. Y. Kim, Emre Tuncer, Rohini Gupta, Byron Krauter, Thomas L. Savarino, Dean P. Neikirk, Lawrence T. Pillage

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993