Paul Coteus

According to our database1, Paul Coteus authored at least 17 papers between 2001 and 2020.

Collaborative distances:

Awards

IEEE Fellow

IEEE Fellow 2013, "For contributions to packaging for high performance computing systems".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
Summit and Sierra supercomputer cooling solutions.
IBM J. Res. Dev., 2020

2014
Addressing failures in exascale computing.
Int. J. High Perform. Comput. Appl., 2014

2013
Packaging the IBM Blue Gene/Q supercomputer.
IBM J. Res. Dev., 2013

2012
The IBM Blue Gene/Q Compute Chip.
IEEE Micro, 2012

2011
Technologies for exascale systems.
IBM J. Res. Dev., 2011

2010
Practical Strategies for Power-Efficient Computing Technologies.
Proc. IEEE, 2010

2009
A 5.4mW 0.0035mm<sup>2</sup> 0.48psrms-jitter 0.8-to-5GHz non-PLL/DLL all-digital phase generator/rotator in 45nm SOI CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
A 2.6mW 370MHz-to-2.5GHz Open-Loop Quadrature Clock Generator.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
An 8 Gb/s/pin 9.6 ns Row-Cycle 288 Mb Deca-Data Rate SDRAM With an I/O Error Detection Scheme.
IEEE J. Solid State Circuits, 2007

The Blue Gene/L Supercomputer: A Hardware and Software Story.
Int. J. Parallel Program., 2007

2005
Overview of the Blue Gene/L system architecture.
IBM J. Res. Dev., 2005

Packaging the Blue Gene/L supercomputer.
IBM J. Res. Dev., 2005

Blue Gene/L torus interconnection network.
IBM J. Res. Dev., 2005


2002
An overview of the BlueGene/L Supercomputer.
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Proceedings of the 2002 ACM/IEEE conference on Supercomputing, 2002


2001
Blue Gene: A vision for protein science using a petaflop supercomputer.
IBM Syst. J., 2001


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