Charlie Huang

According to our database, Charlie Huang authored at least 9 papers between 1996 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Beyond Stars and Commits: A Fair and Manipulation-Resistant Framework for Measuring Developer Contributions.

Yuqiang Sun, Sun Ding, Liwei Tan, Yue Xue, Bo Li, Charles Huang, Siyang Xiong

Proceedings of the 33rd ACM International Conference on the Foundations of Software Engineering, 2025

2021

An Experiment to Convert Structured Product Labels into Computable Prescribing Information.

Allen J. Flynn, Charlie Huang, Natalie Lampa, George Meng, Nate Gittlen, Adam Beck, Brooke Raths, Peter Boisvert

Proceedings of the 9th IEEE International Conference on Healthcare Informatics, 2021

2013

A 0.4-mW/Gb/s Near-Ground Receiver Front-End With Replica Transconductance Termination Calibration for a 16-Gb/s Source-Series Terminated Transceiver.

Kambiz Kaviani, Amir Amirkhany, Charlie Huang, Phuong Le, Wendemagegnehu T. Beyene, Chris J. Madden, Keisuke Saito, Koji Sano, Vinod Inipodu Murugan, Kun-Yung Ken Chang, Xingchao Chuck Yuan

IEEE J. Solid State Circuits, 2013

2012

A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface.

Kambiz Kaviani, Ting Wu, Jason Wei, Amir Amirkhany, Jie Shen, T. J. Chin, Chintan Thakkar, Wendemagegnehu T. Beyene, Norman Chan, Catherine Chen, Bing Ren Chuang, Deborah Dressler, Vijay P. Gadde, Mohammad Hekmat, Eugene Ho, Charlie Huang, Phuong Le, Mahabaleshwara, Chris J. Madden, Navin K. Mishra, Leneesh Raghavan, Keisuke Saito, Ralf Schmitt, Dave Secker, Xudong Shi, H. Md. Shuaeb Fazeel, Gundlapalli Shanmukha Srinivas, Steve Zhang, Chanh Tran, Arun Vaidyanath, Kapil Vyas, Manish Jain, Kun-Yung Ken Chang, Xingchao Yuan

IEEE J. Solid State Circuits, 2012

A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface.

Amir Amirkhany, Jason Wei, Navin K. Mishra, Jie Shen, Wendemagegnehu T. Beyene, Catherine Chen, T. J. Chin, Deborah Dressler, Charlie Huang, Vijay P. Gadde, Mohammad Hekmat, Kambiz Kaviani, Hai Lan, Phuong Le, Mahabaleshwara, Chris J. Madden, Sanku Mukherjee, Leneesh Raghavan, Keisuke Saito, Dave Secker, Arul Sendhil, Ralf Schmitt, H. Md. Shuaeb Fazeel, Gundlapalli Shanmukha Srinivas, Ting Wu, Chanh Tran, Arun Vaidyanath, Kapil Vyas, Ling Yang, Manish Jain, Kun-Yung Ken Chang, Xingchao Yuan

IEEE J. Solid State Circuits, 2012

A 0.4mW/Gb/s 16Gb/s near-ground receiver front-end with replica transconductance termination calibration.

Kambiz Kaviani, Amir Amirkhany, Charlie Huang, Phuong Le, Chris J. Madden, Keisuke Saito, Koji Sano, Vinod Murugan, Wendemagegnehu T. Beyene, Ken Chang, Chuck Yuan

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2003

A 0.4-4-Gb/s CMOS quad transceiver cell using on-chip regulated dual-loop PLLs.

Kun-Yung Ken Chang, Jason Wei, Charlie Huang, Simon Li, Kevin S. Donnelly, Mark Horowitz, Yingxuan Li, Stefanos Sidiropoulos

IEEE J. Solid State Circuits, 2003

1999

A portable digital DLL for high-speed CMOS interface circuits.

Bruno W. Garlepp, Kevin S. Donnelly, Jun Kim, Pak Shing Chau, Jared L. Zerbe, Charlie Huang, Chanh Tran, Clemenz L. Portmann, Donald Stark, Yiu-Fai Chan, Thomas H. Lee, Mark A. Horowitz

IEEE J. Solid State Circuits, 1999

1996

A 660 MB/s interface megacell portable circuit in 0.3 μm-0.7 μm CMOS ASIC.

Kevin S. Donnelly, Yiu-Fai Chan, John T. C. Ho, Chanh Tran, Samir Patel, Benedict Lau, Jun Kim, Pak Shing Chau, Charlie Huang, Jason Wei, Leung Yu, Richard Tarver, Rakhee Kulkarni, Don Stark, Mark Johnson

IEEE J. Solid State Circuits, 1996