Davide Bruni

According to our database1, Davide Bruni authored at least 15 papers between 2001 and 2005.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2005
Progettazione di sistemi su singolo chip a basso consumo di potenza.
PhD thesis, 2005

2004
Memory energy minimization by data compression: algorithms, architectures and implementation.
IEEE Trans. Very Large Scale Integr. Syst., 2004

Integrated Task Scheduling and Data Assignment for SDRAMs in Dynamic Applications.
IEEE Des. Test Comput., 2004

2003
Discharge Current Steering for Battery Lifetime Optimization.
IEEE Trans. Computers, 2003

SystemC Cosimulation and Emulation of Multiprocessor SoC Designs.
Computer, 2003

Hardw are Implementation of Data Compression Algorithms for Memory Energy Optimization.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms.
Proceedings of the 2003 Design, 2003

SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms.
Proceedings of the Embedded Software for SoC, 2003

2002
A Framework for Modeling and Estimating the Energy Dissipation of VLIW-Based Embedded Systems.
Des. Autom. Embed. Syst., 2002

An adaptive data compression scheme for memory traffic minimization in processor-based systems.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors.
Proceedings of the 2002 Design, 2002

System lifetime extension by battery management: an experimental work.
Proceedings of the International Conference on Compilers, 2002

2001
Delay-sensitive power estimation at the register-transfer level.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Statistical Design Space Exploration for Application-Specific Unit Synthesis.
Proceedings of the 38th Design Automation Conference, 2001


  Loading...