Debora Matos

According to our database, Debora Matos authored at least 19 papers between 2009 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Architectural exploration of Last-Level Caches targeting homogeneous multicore systems.

Rodrigo Cataldo, Guilherme Korol, Ramon Fernandes, Debora Matos, César A. M. Marcon

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Evaluation of emerging TSV-enabled main memories on the PARSEC benchmark.

Rodrigo Cataldo, Guilherme Korol, Ramon Fernandes, Gustavo Sanchez, Debora Matos, César A. M. Marcon

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

Performance evaluation of hierarchical NoC topologies for stacked 3D ICs.

Debora Matos, Max Prass, Márcio Eduardo Kreutz, Luigi Carro, Altamiro Amadeu Susin

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

Adaptive multiple switching strategy toward an ideal NoC.

Debora Matos, Márcio Eduardo Kreutz, Cezar Reinbrecht, Luigi Carro, Altamiro Amadeu Susin

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

A NOC closed-loop performance monitor and adapter.

Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Márcio Eduardo Kreutz, Fernanda Gusmão de Lima Kastensmidt, Altamiro Amadeu Susin

Microprocess. Microsystems, 2013

A power-efficient hierarchical network-on-chip topology for stacked 3D ICs.

Debora Matos, Cezar Reinbrecht, Tiago Motta, Altamiro Amadeu Susin

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Combining fault tolerance and serialization effort to improve yield in 3D Networks-on-Chip.

Anelise Kologeski, Caroline Concatto, Debora Matos, Daniel Grehs, Tiago Motta, Felipe Almeida, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Ricardo Reis

Proceedings of the 20th IEEE International Conference on Electronics, 2013

Hierarchical and Multiple Switching NoC with Floorplan Based Adaptability.

Debora Matos, Cezar Reinbrecht, Márcio Eduardo Kreutz, Gianluca Palermo, Luigi Carro, Altamiro Amadeu Susin

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

2012

Floorplan-aware hierarchical NoC topology with GALS interfaces.

Debora Matos, Cezar Reinbrecht, Gianluca Palermo, Jonathan Martinelli, Altamiro Amadeu Susin, Cristina Silvano, Luigi Carro

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Reconfigurable Routers for Low Power and High Performance.

Debora Matos, Caroline Concatto, Márcio Eduardo Kreutz, Fernanda Lima Kastensmidt, Luigi Carro, Altamiro Amadeu Susin

IEEE Trans. Very Large Scale Integr. Syst., 2011

Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip.

Debora Matos, Gianluca Palermo, Vittorio Zaccaria, Cezar Reinbrecht, Altamiro Amadeu Susin, Cristina Silvano, Luigi Carro

Proceedings of the 4th International Workshop on Network on Chip Architectures, 2011

A new reconfigurable clock-gating technique for low power SRAM-based FPGAs.

Luca Sterpone, Luigi Carro, Debora Matos, Stephan Wong, F. Fakhar

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Network interface to synchronize multiple packets on NoC-based Systems-on-Chip.

Debora Matos, Miklecio Costa, Luigi Carro, Altamiro Amadeu Susin

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

Monitor-adapter coupling for NOC performance tuning.

Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz

Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Associating packets of heterogeneous cores using a synchronizer wrapper for NoCs.

Debora Matos, Luigi Carro, Altamiro Amadeu Susin

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router.

Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Érika F. Cota, Márcio Eduardo Kreutz

Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

Adaptive router architecture based on traffic behavior observability.

Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz

Proceedings of the Second International Workshop on Network on Chip Architectures, 2009

NoC Power Optimization Using a Reconfigurable Router.

Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

The Need for Reconfigurable Routers in Networks-on-Chip.

Debora Matos, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin

Proceedings of the Reconfigurable Computing: Architectures, 2009