Deming Zhang

Orcid: 0000-0001-7261-371X

According to our database1, Deming Zhang authored at least 35 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Logic-in-Memory Based on Majority Gates With Voltage-Gated SOT-MRAM Crossbar Arrays.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

In-Memory Wallace Tree Multipliers Based on Majority Gates Within Voltage-Gated SOT-MRAM Crossbar Arrays.
IEEE Trans. Very Large Scale Integr. Syst., March, 2024

A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

2023
A Novel 9T1C-SRAM Compute-In-Memory Macro With Count-Less Pulse-Width Modulation Input and ADC-Less Charge-Integration-Count Output.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2023

Design of Ultracompact Content Addressable Memory Exploiting 1T-1MTJ Cell.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023

2022
A Machine Learning Attack-Resilient Strong PUF Leveraging the Process Variation of MRAM.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Spintronic Solutions for Approximate Computing.
Proceedings of the Approximate Computing, 2022

2021
Empirical evaluation on the effect of enterprise quality immune response based on EMIBSGTD-TAS.
J. Intell. Fuzzy Syst., 2021

A Novel Multi-Context Non-Volatile Content-Addressable Memory Cell and Multi-Level Architecture for High Reliability and Density.
Proceedings of the 10th IEEE Non-Volatile Memory Systems and Applications Symposium, 2021

Fully Single Event Double Node Upset Tolerant Design for Magnetic Random Access Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

SpinSim: A Computer Architecture-Level Variation Aware STT-MRAM Performance Evaluation Framework.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Spin-Orbit Torque Nonvolatile Flip-Flop Designs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Reconfigurable Arbiter PUF Based on STT-MRAM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Radiation Hardened Design of STT-MRAM with High Recoverability from Double Node Upset.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

2020
Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories.
IEEE Trans. Circuits Syst., 2020

Design of Magnetic Non-Volatile TCAM With Priority-Decision in Memory Technology for High Speed, Low Power, and High Reliability.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Compact Modeling and Analysis of Voltage-Gated Spin-Orbit Torque Magnetic Tunnel Junction.
IEEE Access, 2020

Voltage-Gated Spin-Hall Effect Based Magnetic Non-Volatile Flip-Flop for High Speed, Low Power and Compact Cell Area.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Modeling Attack Resilient Physical Unclonable Function Based on STT-MRAM.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

2019
A Novel MTJ-Based Non-Volatile Ternary Content-Addressable Memory for High-Speed, Low-Power, and High-Reliable Search Operation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Low-Power, High-Speed and High-Density Magnetic Non-Volatile SRAM Design with Voltage-Gated Spin-Orbit Torque.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

Modulation and Demodulation of Digital Frequency Shift Keying System Based on Spin Torque Nano Oscillator with Voltage Controlled Magnetic Anisotropy Effect.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Hardware Acceleration Implementation of Sparse Coding Algorithm with Spintronic Devices.
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

A Novel 15T-4MTJ based Non-volatile Ternary Content-Addressable Memory Cell for High-Speed, Low-Power and High-Reliable Search Operation.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017
Frequency modulation of spin torque nano oscillator with voltage controlled magnetic anisotropy effect.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

Proposal for novel magnetic memory device with spin momentum locking materials.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

2016
All Spin Artificial Neural Networks Based on Compound Spintronic Synapse and Neuron.
IEEE Trans. Biomed. Circuits Syst., 2016

Stochastic spintronic device based synapses and spiking neurons for neuromorphic computation.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Spin wave based synapse and neuron for ultra low power neuromorphic computation system.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Realization of neural coding by stochastic switching of magnetic tunnel junction.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015

Energy-efficient neuromorphic computation based on compound spin synapse with stochastic learning.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2011
Gosset lattice spherical vector quantizationwith lowcomplexity.
Proceedings of the IEEE International Conference on Acoustics, 2011

2010
Superwideband extension of g.718 and g.729.1 speech codecs.
Proceedings of the INTERSPEECH 2010, 2010

2009
Candidate proposal for ITU-T super-wideband speech and audio coding.
Proceedings of the IEEE International Conference on Acoustics, 2009

2008
On the ITU-T G.729.1 silence compression scheme.
Proceedings of the 2008 16th European Signal Processing Conference, 2008


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