Mario Konijnenburg

Orcid: 0000-0001-8016-0888

Affiliations:
  • IMEC, Eindhoven, The Netherlands
  • Delft University of Technology, The Netherlands


According to our database1, Mario Konijnenburg authored at least 59 papers between 1993 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

Online presence:

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Bibliography

2024
23.5 A 7.6mW IR-UWB Receiver Achieving -13dBm Blocker Resilience with a Linear RF Front-End.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems.
IEEE Trans. Computers, September, 2023

A memory footprint optimization framework for Python applications targeting edge devices.
J. Syst. Archit., September, 2023

Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A 1.66Gb/s and 5.8pJ/b Transcutaneous IR-UWB Telemetry System with Hybrid Impulse Modulation for Intracortical Brain-Computer Interfaces.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

VWR2A: a very-wide-register reconfigurable-array architecture for low-power embedded devices.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

SENeCA: Scalable Energy-efficient Neuromorphic Computer Architecture.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021
A 134 DB Dynamic Range Noise Shaping Slope Light-to-Digital Converter for Wearable Chest PPG Applications.
IEEE Trans. Biomed. Circuits Syst., 2021

A 28μW 134dB DR 2nd-Order Noise-Shaping Slope Light-to-Digital Converter for Chest PPG Monitoring.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
Binary CorNET: Accelerator for HR Estimation From Wrist-PPG.
IEEE Trans. Biomed. Circuits Syst., 2020

A 119dB Dynamic Range Charge Counting Light-to-Digital Converter For Wearable PPG/NIRS Monitoring Applications.
IEEE Trans. Biomed. Circuits Syst., 2020

Memory Footprint Optimization Techniques for Machine Learning Applications in Embedded Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
A 769 μW Battery-Powered Single-Chip SoC With BLE for Multi-Modal Vital Sign Monitoring Health Patches.
IEEE Trans. Biomed. Circuits Syst., 2019

CorNET: Deep Learning Framework for PPG-Based Heart Rate Estimation and Biometric Identification in Ambulant Environment.
IEEE Trans. Biomed. Circuits Syst., 2019

A Bio-Impedance Readout IC With Digital-Assisted Baseline Cancellation for Two-Electrode Measurement.
IEEE J. Solid State Circuits, 2019

A 196μW, Reconfigurable Light-to-Digital Converter with 119dB Dynamic Range, for Wearable PPG/NIRS Sensors.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 769μW Battery-Powered Single-Chip SoC With BLE for Multi-Modal Vital Sign Health Patches.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A Bio-Impedance Readout IC With Digital-Assisted Baseline Cancellation for 2-Electrode Measurement.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

A 5-Channel Unipolar Fetal-ECG Readout IC for Patch-Based Fetal Monitoring.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

BioTranslator: Inferring R-Peaks from Ambulatory Wrist-Worn PPG Signal.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019

Real-time HR Estimation from wrist PPG using Binary LSTMs.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

2018
A 665 μW Silicon Photomultiplier-Based NIRS/EEG/EIT Monitoring ASIC for Wearable Functional Brain Imaging.
IEEE Trans. Biomed. Circuits Syst., 2018

A 36 μW 1.1 mm<sup>2</sup> Reconfigurable Analog Front-End for Cardiovascular and Respiratory Signals Recording.
IEEE Trans. Biomed. Circuits Syst., 2018

A 665μW silicon photomultiplier-based NIRS/EEG/EIT monitoring asic for wearable functional brain imaging.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

BiometricNet: Deep Learning based Biometric Identification using Wrist-Worn PPG.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2016
A Multi(bio)sensor Acquisition System With Integrated Processor, Power Management, 8×8 LED Drivers, and Simultaneously Synchronized ECG, BIO-Z, GSR, and Two PPG Readouts.
IEEE J. Solid State Circuits, 2016

28.4 A battery-powered efficient multi-sensor acquisition system with simultaneous ECG, BIO-Z, GSR, and PPG.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016


2015
A 345 µW Multi-Sensor Biomedical SoC With Bio-Impedance, 3-Channel ECG, Motion Artifact Reduction, and Integrated DSP.
IEEE J. Solid State Circuits, 2015

2014
ULP-SRP: Ultra Low-Power Samsung Reconfigurable Processor for Biomedical Applications.
ACM Trans. Reconfigurable Technol. Syst., 2014

A Configurable and Low-Power Mixed Signal SoC for Portable ECG Monitoring Applications.
IEEE Trans. Biomed. Circuits Syst., 2014

18.3 A multi-parameter signal-acquisition SoC for connected personal health applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

10.6 A 0.74V 200μW multi-standard transceiver digital baseband in 40nm LP-CMOS for 2.4GHz Bluetooth Smart / ZigBee / IEEE 802.15.6 personal area networks.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
Reliable and energy-efficient 1MHz 0.4V dynamically reconfigurable SoC for ExG applications in 40nm LP CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

An energy-aware and scalable UWB Impulse Radio baseband supporting coherent reception.
Proceedings of the 2013 IEEE Global Communications Conference, 2013

In-situ performance monitor employing threshold based notifications (TheBaN).
Proceedings of the ESSCIRC 2013, 2013

2012
A DfT Architecture for 3D-SICs Based on a Standardizable Die Wrapper.
J. Electron. Test., 2012

A meter-range UWB transceiver chipset for around-the-head audio streaming.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
A 2.4 GHz ULP OOK Single-Chip Transceiver for Healthcare Applications.
IEEE Trans. Biomed. Circuits Syst., 2011

An Ultra Low Energy Biomedical Signal Processing System Operating at Near-Threshold.
IEEE Trans. Biomed. Circuits Syst., 2011

A 2.4GHz ULP OOK single-chip transceiver for healthcare applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A voltage-scalable biomedical signal processor running ECG using 13pJ/cycle at 1MHz and 0.4V.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Evaluation of 90nm 6T-SRAM as Physical Unclonable Function for secure key generation in wireless sensor nodes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Automation of 3D-DfT Insertion.
Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010
A structured and scalable test access architecture for TSV-based 3D stacked ICs.
Proceedings of the 28th IEEE VLSI Test Symposium, 2010

3D DfT architecture for pre-bond and post-bond testing.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

2006
A Gate-Level Method for Transistor-Level Bridging Fault Diagnosis.
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

1999
Benchmarking DAT with the ITC'99 ATPG Benchmarks.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Testability of the Philips 80C51 micro-controller.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Illegal State Space Identification for Sequential Circuit Test Generation.
Proceedings of the 1999 Design, 1999

Fault (In)Dependent Cost Estimates and Conflict-Directed Backtracking to Guide Sequential Circuit Test Generation.
Proceedings of the 8th Asian Test Symposium (ATS '99), 1999

1998
Complete Search in Test Generation for Industrial Circuits with Improved Bus-Conflict Detection.
Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

1997
Sequential Test Generation with Advanced Illegal State Search.
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1996
Accelerated Compact Test Set Generation for Three-State Circuits.
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Circuit Partitioned Automatic Test Pattern Generation Constrained by Three-State Buses and Restrictors.
Proceedings of the 5th Asian Test Symposium (ATS '96), 1996

1995
Compact test sets for industrial circuits.
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

1994
Test generation and three-state elements, buses, and bidirectionals.
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Parallel Pattern Fast Fault Simulation for Three-State Circuits and Bidirectional I/O.
Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1993
Test Pattern Generation with Restrictors.
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993


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