Junichiro Kadomoto

According to our database, Junichiro Kadomoto authored at least 35 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

FPGA-based Garbling Accelerator with Parallel Pipeline Processing.

Rin Oishi, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

IEICE Trans. Inf. Syst., December, 2023

A Principal Factor of Performance in Decoupled Front-End.

Yuya Degawa, Toru Koizumi, Tomoki Nakamura, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

IEICE Trans. Inf. Syst., December, 2023

Dynamically Reconfigurable Network Protocol for Shape-Changeable Computer System.

Shun Nagasaki, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

IEEE Des. Test, December, 2023

iKnowde: Interactive Learning Path Generation System Based on Knowledge Dependency Graphs.

Takashi Murayama, Shu Sugita, Hiroyuki Saegusa, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the Adjunct Proceedings of the 36th Annual ACM Symposium on User Interface Software and Technology, 2023

A Functional Reactive Programming Language for Wirelessly Connected Shape-Changeable Chiplet-Based Computers.

Yusuke Izawa, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the Companion Proceedings of the 2023 ACM SIGPLAN International Conference on Systems, 2023

Clockhands: Rename-free Instruction Set Architecture for Out-of-order Processors.

Toru Koizumi, Ryota Shioya, Shu Sugita, Taichi Amano, Yuya Degawa, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

An Out-of-Order Superscalar Processor Using STRAIGHT Architecture in 28 nm CMOS.

Taichi Amano, Junichiro Kadomoto, Satoshi Mitsuno, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Evaluation of Different Microarchitectures for Energy-Efficient RISC-V Cores.

Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022

Deformable Chiplet-Based Computer Using Inductively Coupled Wireless Communication.

Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

Toward Wirelessly Cooperated Shape-Changing Computing Particles.

Junichiro Kadomoto, Takuya Sasatani, Koya Narumi, Naoto Usami, Hidetsugu Irie, Shuichi Sakai, Yoshihiro Kawahara

IEEE Pervasive Comput., 2021

Multiport Register File Design for High-Performance Embedded Cores.

Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2021

Accurate and Fast Performance Modeling of Processors with Decoupled Front-end.

Yuya Degawa, Toru Koizumi, Tomoki Nakamura, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Compiling and Optimizing Real-world Programs for STRAIGHT ISA.

Toru Koizumi, Shu Sugita, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

2020

Design of Shape-Changeable Chiplet-Based Computers Using an Inductively Coupled Wireless Bus Interface.

Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 38th IEEE International Conference on Computer Design, 2020

A High-Performance Out-of-Order Soft Processor Without Register Renaming.

Satoshi Mitsuno, Junichiro Kadomoto, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

A RISC-V Processor with an Inter-Chiplet Wireless Communication Interface for Shape-Changeable Computers.

Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 2020 IEEE Symposium in Low-Power and High-Speed Chips, 2020

A Self-Sensing Technique Using Inductively-Coupled Coils for Deformable User Interfaces.

Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the AsianCHI '20: Proceedings of the 2020 Symposium on Emerging Research from Asia and on Asian Contexts and Cultures, 2020

An Inductively Coupled Wireless Bus for Chiplet-Based Systems.

Junichiro Kadomoto, Satoshi Mitsuno, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor.

Susumu Mashimo, Koji Inoue, Ryota Shioya, Akifumi Fujita, Reoma Matsuo, Seiya Akaki, Akifumi Fukuda, Toru Koizumi, Junichiro Kadomoto, Hidetsugu Irie, Masahiro Goshima

Proceedings of the International Conference on Field-Programmable Technology, 2019

WiXI: An Inter-Chip Wireless Bus Interface for Shape-Changeable Chiplet-Based Computers.

Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai

Proceedings of the 37th IEEE International Conference on Computer Design, 2019

A Sensing Technique for Data Glove Using Conductive Fiber.

Ryosuke Takada, Junichiro Kadomoto, Buntarou Shizuki

Proceedings of the Extended Abstracts of the 2019 CHI Conference on Human Factors in Computing Systems, 2019

2018

Escalator Network for a 3D Chip Stack with Inductive Coupling ThruChip Interface.

Akio Nomura, Yusuke Matsushita, Junichiro Kadomoto, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano

Int. J. Netw. Comput., 2018

QUEST: A 7.49TOPS multi-purpose log-quantized DNN inference engine stacked on 96MB 3D SRAM using inductive-coupling technology in 40nm CMOS.

Kodai Ueyoshi, Kota Ando, Kazutoshi Hirose, Shinya Takamaeda-Yamazaki, Junichiro Kadomoto, Tomoki Miyata, Mototsugu Hamada, Tadahiro Kuroda, Masato Motomura

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

An Area-Efficient Out-of-Order Soft-Core Processor Without Register Renaming.

Junichiro Kadomoto, Toru Koizumi, Akifumi Fukuda, Reoma Matsuo, Susumu Mashimo, Akifumi Fujita, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai

Proceedings of the International Conference on Field-Programmable Technology, 2018

2017

An inductive-coupling link for 3-D Network-on-Chips.

Junichiro Kadomoto, Hideharu Amano, Tadahiro Kuroda

Proceedings of the International SoC Design Conference, 2017

A Practical Collision Avoidance Method for an Inter-Chip Bus with Wireless Inductive through Chip Interface.

Akio Nomura, Junichiro Kadomoto, Tadahiro Kuroda, Hideharu Amano

Proceedings of the Fifth International Symposium on Computing and Networking, 2017

2016

A 6 Gb/s 6 pJ/b 5 mm-Distance Non-Contact Interface for Modular Smartphones Using Two-Fold Transmission Line Coupler and High EMC Tolerant Pulse Transceiver.

Atsutake Kosuge, Junichiro Kadomoto, Tadahiro Kuroda

IEEE J. Solid State Circuits, 2016

Analysis and Evaluation of Electromagnetic Interference between ThruChip Interface and LC-VCO.

Junichiro Kadomoto, So Hasegawa, Yusuke Kiuchi, Atsutake Kosuge, Tadahiro Kuroda

IEICE Trans. Electron., 2016

Vertical Packet Switching Elevator Network Using Inductive Coupling ThruChip Interface.

Akio Nomura, Hiroki Matsutani, Tadahiro Kuroda, Junichiro Kadomoto, Yusuke Matsushita, Hideharu Amano

Proceedings of the Fourth International Symposium on Computing and Networking, 2016

A 1 Tb/s/mm² inductive-coupling side-by-side chip link.

So Hasegawa, Junichiro Kadomoto, Atsutake Kosuge, Tadahiro Kuroda

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

An inductive-coupling bus with collision detection scheme using magnetic field variation for 3-D network-on-chips.

Junichiro Kadomoto, Tomoki Miyata, Hideharu Amano, Tadahiro Kuroda

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

Analytical thruchip inductive coupling channel design optimization.

Li-Chung Hsu, Junichiro Kadomoto, So Hasegawa, Atsutake Kosuge, Yasuhiro Take, Tadahiro Kuroda

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

A Study of Physical Design Guidelines in ThruChip Inductive Coupling Channel.

Li-Chung Hsu, Junichiro Kadomoto, So Hasegawa, Atsutake Kosuge, Yasuhiro Take, Tadahiro Kuroda

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

10.1 A 6Gb/s 6pJ/b 5mm-distance non-contact interface for modular smartphones using two-fold transmission-line coupler and EMC-qualified pulse transceiver.

Atsutake Kosuge, Shu Ishizuka, Junichiro Kadomoto, Tadahiro Kuroda

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Design and analysis for ThruChip design for manufacturing (DFM).

Li-Chung Hsu, Yasuhiro Take, Atsutake Kosuge, So Hasegawa, Junichiro Kadamoto, Tadahiro Kuroda

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015