Kazi Asifuzzaman

According to our database, Kazi Asifuzzaman authored at least 13 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

CMOS-Based Single-Cycle in-Memory XOR/XNOR.

Shamiul Alam, Jack Hutchins, Nikhil Shukla, Kazi Asifuzzaman, Ahmedullah Aziz

IEEE Access, 2024

2023

A Novel Scalable Array Design for III-V Compound Semiconductor-based Nonvolatile Memory (UltraRAM) with Separate Read-Write Paths.

Shamiul Alam, Kazi Asifuzzaman, Ahmedullah Aziz

Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

2022

Performance and Power Estimation of STT-MRAM Main Memory with Reliable System-level Simulation.

Kazi Asifuzzaman, Rommel Sánchez Verdejo, Petar Radojkovic

ACM Trans. Embed. Comput. Syst., 2022

Evaluating HPC Kernels for Processing in Memory.

Kazi Asifuzzaman, Mohammad Alaul Haque Monil, Frank Liu, Jeffrey S. Vetter

Proceedings of the 2022 International Symposium on Memory Systems, 2022

2021

Demystifying the Characteristics of High Bandwidth Memory for Real-Time Systems.

Kazi Asifuzzaman, Mohamed Abuelala, Mohamed Hassan, Francisco J. Cazorla

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

The UP2DATE Baseline Research Platforms.

Alvaro Jover-Alvarez, Alejandro J. Calderón, Iván Rodriguez, Leonidas Kosmidis, Kazi Asifuzzaman, Patrick Uven, Kim Grüttner, Tomaso Poggi, Irune Agirre

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2019

Evaluation of STT-MRAM main memory for HPC and real-time systems.

Kazi Asifuzzaman

PhD thesis, 2019

STT-MRAM for real-time embedded systems: performance and WCET implications.

Kazi Asifuzzaman, Mikel Fernández, Petar Radojkovic, Jaume Abella, Francisco J. Cazorla

Proceedings of the International Symposium on Memory Systems, 2019

2018

Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned.

Milan Radulovic, Kazi Asifuzzaman, Darko Zivanovic, Nikola Rajovic, Guillaume Colin de Verdière, Dirk Pleiter, Manolis Marazakis, Nikolaos D. Kallimanis, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé

Proceedings of the 30th International Symposium on Computer Architecture and High Performance Computing, 2018

Main memory latency simulation: the missing link.

Rommel Sánchez Verdejo, Kazi Asifuzzaman, Milan Radulovic, Petar Radojkovic, Eduard Ayguadé, Bruce L. Jacob

Proceedings of the International Symposium on Memory Systems, 2018

HPC Benchmarking: Scaling Right and Looking Beyond the Average.

Milan Radulovic, Kazi Asifuzzaman, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé

Proceedings of the Euro-Par 2018: Parallel Processing, 2018

2017

Enabling a reliable STT-MRAM main memory simulation.

Kazi Asifuzzaman, Rommel Sánchez Verdejo, Petar Radojkovic

Proceedings of the International Symposium on Memory Systems, 2017

2016

Performance Impact of a Slower Main Memory: A case study of STT-MRAM in HPC.

Kazi Asifuzzaman, Milan Pavlovic, Milan Radulovic, David Zaragoza, Ohseong Kwon, Kyung-Chang Ryoo, Petar Radojkovic

Proceedings of the Second International Symposium on Memory Systems, 2016