Marvin Onabajo

Orcid: 0000-0002-6044-3693

According to our database1, Marvin Onabajo authored at least 71 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
On-Chip Power Monitoring: Leveraging High-Sensitivity Differential Temperature Sensors With Chopper Stabilization and Offset Calibration.
IEEE Trans. Instrum. Meas., 2024

2023
Design and Analysis of an On-Chip Current-Driven CMOS Parametric Frequency Divider.
IEEE Trans. Circuits Syst. I Regul. Pap., May, 2023

Modeling and Simulation of Circuit-Level Nonidealities for an Analog Computing Design Approach With Application to EEG Feature Extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023

Circuit-Level Modeling and Simulation of Wireless Sensing and Energy Harvesting With Hybrid Magnetoelectric Antennas for Implantable Neural Devices.
IEEE Open J. Circuits Syst., 2023

Identification of Stealthy Hardware Trojans through On-Chip Temperature Sensing and an Autoencoder-Based Machine Learning Algorithm.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Invited: An Active Filter Balun and Frequency Doubler for Parametric Phase Noise Reduction Systems.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022
An Ultra-Low Power RSSI Amplifier for EEG Feature Extraction to Detect Seizures.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 0.061 nJ/b 10 Mbps Hybrid BF-PSK Receiver for Internet of Things Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Shared Offset Cancellation and Chopping Techniques to Enhance the Voltage Accuracy of Multi-Amplifier Systems for Feedback Sensing in Power Management Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A 30% Efficient High-Output Voltage Fully Integrated Self-Biased Gate RF Rectifier Topology for Neural Implants.
IEEE J. Solid State Circuits, 2022

Design of a CMOS Parametric Frequency Divider with 2.4-GHz Output Frequency for RF Systems-on-a-Chip.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A Practical and Design oriented approach to teaching circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
On-Chip Thermal Profiling to Detect Malicious Activity: System-Level Concepts and Design of Key Building Blocks.
IEEE Trans. Very Large Scale Integr. Syst., 2021

Buck Circuit Design With Pseudo-Constant Frequency and Constant On-Time for High Current Point-of-Load Regulation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Analysis and Experimental Validation of Large-Signal Linearization for Low-Power Complex OTA-C Filters.
IEEE Open J. Circuits Syst., 2021

A 1.16-V 5.8-to-13.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference Circuit With a Shared Offset-Cancellation Method for Internal Amplifiers.
IEEE J. Solid State Circuits, 2021

Simulation and Experimental Evaluation of Energy Harvesting Circuits with Magnetoelectric Antennas.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2020
Strategies and Demonstration to Support Multiple Wireless Protocols with a Single RF Front-End.
IEEE Wirel. Commun., 2020

A Low-Power BFSK Transmitter Architecture for Biomedical Applications.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

Reflective Parametric Frequency Selective Limiters with sub-dB Loss and μWatts Power Thresholds.
CoRR, 2020

Modeling of Magnetoelectric Antennas for Circuit Simulations in Magnetic Sensing Applications.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

RSSI Amplifier Design for a Feature Extraction Technique to Detect Seizures with Analog Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A High Efficiency DC-DC Converter Architecture with Adjustable Switching Frequency to Suppress Noise Injection in RF Receiver Front-Ends.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
An FPGA Design Technique to Receive Multiple Wireless Protocols with the Same RF Front End.
Proceedings of the 2019 Wireless Days, 2019

A Chopper Instrumentation Amplifier with Fully Symmetric Negative Capacitance Generation Feedback Loop and Online Digital Calibration for Input Impedance Boosting.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Comparator Design and Calibration for Flash ADCs within Two-Step ADC Architectures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Sinusoidal Signal Generation Through Successive Integration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Analysis and Demonstration of an IIP3 Improvement Technique for Low-Power RF Low-Noise Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Modeling of Thermal Coupling and Temperature Sensor Circuit Design Considerations for Hardware Trojan Detection.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Design Considerations and Experimental Verification of a 10.5mW 1GS/s Hybrid ADC for Portable Wireless Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Low-Power Complex Bandpass Gm-C Filter with Dynamic Range Expansion through Adaptive Biasing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Study of Performance Impact from Powering RF Receiver Front-End Circuits with a DC-DC Converter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Detection of Different Wireless Protocols on an FPGA with the Same Analog/RF Front End.
Proceedings of the Cognitive Radio Oriented Wireless Networks, 2018

2017
A Low-Power High-Speed Hybrid ADC With Merged Sample-and-Hold and DAC Functions for Efficient Subranging Time-Interleaved Operation.
IEEE Trans. Very Large Scale Integr. Syst., 2017

An Analog Front-End Chip With Self-Calibrated Input Impedance for Monitoring of Biosignals via Dry Electrode-Skin Interfaces.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A transmitter architecture for wireless medical devices in the MICS band.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Design of clock generation circuitry for high-speed subranging time-interleaved ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Linear input range extension for low-voltage operational transconductance amplifiers in Gm-C filters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Low-power low-noise amplifier IIP3 improvement under consideration of the cascode stage.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
An Optimization Platform for Digital Predistortion of Power Amplifiers.
IEEE Des. Test, 2016

Performance enhancement techniques and verification methods for radio frequency circuits and systems.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

A Tuning Technique for Temperature and Process Variation Compensation of Power Amplifiers with Digital Predistortion.
Proceedings of the 25th IEEE North Atlantic Test Workshop, 2016

2015
Efficient Broadband Current-Mode Adder- Quantizer Design for Continuous-Time Sigma-Delta Modulators.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Digitally programmable offset compensation of comparators in flash ADCs for hybrid ADC architectures.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

On-chip digital calibration for automatic input impedance boosting during biopotential measurements.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A low-power hybrid ADC architecture for high-speed medium-resolution applications.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A low-power temperature-compensated relaxation oscillator for built-in test signal generation.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

Inductorless linearization of low-power active mixers.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Accurate and Efficient On-Chip Spectral Analysis for Built-In Testing and Calibration Approaches.
IEEE Trans. Very Large Scale Integr. Syst., 2014

External Capacitor-Less Low Drop-Out Regulator With 25 dB Superior Power Supply Rejection in the 0.4-4 MHz Range.
IEEE J. Solid State Circuits, 2014

Wide Dynamic Range CMOS Amplifier Design for RF Signal Power Detection via Electro-Thermal Coupling.
J. Electron. Test., 2014

Test signal generation for the calibration of analog front-end circuits in biopotential measurement applications.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A fully-differential CMOS low-pass notch filter for biosignal measurement devices with high interference rejection.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Design techniques for external capacitor-less LDOs with high PSR over wide frequency range.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A built-in calibration system to optimize third-order intermodulation performance of RF amplifiers.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Instrumentation amplifier input capacitance cancellation for biopotential and bioimpedance measurements.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A built-in calibration system with a reduced FFT engine for linearity optimization of low power LNA.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2013
IIP3 Enhancement of Subthreshold Active Mixers.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

A 10-bit 64MS/s SAR ADC using variable clock period method.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A current-mode flash ADC for low-power continuous-time sigma delta modulators.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Linearization of subthreshold low-noise amplifiers.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Minimum energy operation for clustered island-style FPGAs.
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

2012
Minimum Energy Analysis and Experimental Verification of a Latch-Based Subthreshold FPGA.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

2011
Electrothermal Design Procedure to Observe RF Circuit Power and Linearity Characteristics With a Homodyne Differential Temperature Sensor.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

Survey of Robustness Enhancement Techniques for Wireless Systems-on-a-Chip and Study of Temperature as Observable for Process Variations.
J. Electron. Test., 2011

2010
Attenuation-Predistortion Linearization of CMOS OTAs With Digital Correction of Process Variations in OTA-C Filter Applications.
IEEE J. Solid State Circuits, 2010

A 25 MHz Bandwidth 5th-Order Continuous-Time Low-Pass Sigma-Delta Modulator With 67.7 dB SNDR Using Time-Domain Quantization and Feedback.
IEEE J. Solid State Circuits, 2010

2009
An On-Chip Loopback Block for RF Transceiver Built-In Test.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

Non-invasive RF built-in testing using on-chip temperature sensors.
Proceedings of the 2009 IEEE International Test Conference, 2009

2008
A Current Injection Built-In Test Technique for RF Low-Noise Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008


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