Michael Wieckowski

According to our database1, Michael Wieckowski authored at least 24 papers between 2004 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
Circuits for a Cubic-Millimeter Energy-Autonomous Wireless Intraocular Pressure Monitor.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A Low-Cost Audio Computer for Information Dissemination Among Illiterate People Groups.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Centip3De: A 64-Core, 3D Stacked Near-Threshold System.
IEEE Micro, 2013

Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS.
IEEE J. Solid State Circuits, 2013

Centip3De: a many-core prototype exploring 3D integration and near-threshold computing.
Commun. ACM, 2013

2012
Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
CAS-FEST 2010: Mitigating Variability in Near-Threshold Computing.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

A cubic-millimeter energy-autonomous wireless intraocular pressure monitor.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 128kb high density portless SRAM using hierarchical bitlines and thyristor sense amplifiers.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

A dense 45nm half-differential SRAM with lower minimum operating voltage.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits.
Proc. IEEE, 2010

Early detection of oxide breakdown through in situ degradation sensing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Circuit design advances to enable ubiquitous sensing environments.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Crosshairs SRAM - An adaptive memory for mitigating parametric failures.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

A case for custom silicon in enabling low-cost information technology for developing regions.
Proceedings of the First ACM Annual Symposium on Computing for Development, 2010

A black box method for stability analysis of arbitrary SRAM cell structures.
Proceedings of the Design, Automation and Test in Europe, 2010

Analyzing the impact of Double Patterning Lithography on SRAM variability in 45nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2008
A portless SRAM Cell using stunted wordline drivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Timing yield enhancement through soft edge flip-flop based design.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Portless SRAM - A High-Performance Alternative to the 6T Methodology.
IEEE J. Solid State Circuits, 2007

A Self-Biased Charge-Transfer Sense Amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
A novel five-transistor (5T) sram cell for high performance cache.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

A New Test Methodology For DNL Error In Flash ADC's.
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

2004
A 32Kb SRAM cache using current mode operation and asynchronous wave-pipelined decoders.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004


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