Salvatore Barone

Orcid: 0000-0003-2007-3744

According to our database1, Salvatore Barone authored at least 24 papers between 2019 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
OpRA: Optimizing Resiliency Assessment for Deep Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2026

Reliability analysis of hardware accelerators for decision tree-based classifier systems.
Future Gener. Comput. Syst., 2026

2025
Investigating the Resilience Source of Classification Systems for Approximate Computing Techniques.
IEEE Trans. Emerg. Top. Comput., 2025

Designing Energy-Efficient Approximate Circuits for the FPGA Technology.
Proceedings of the 28th Euromicro Conference on Digital System Design, 2025

Automatic generation of input-aware approximate arithmetic circuits.
Proceedings of the 28th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2025

2024
FPGA approximate logic synthesis through catalog-based AIG-rewriting technique.
J. Syst. Archit., 2024

Exploiting Functional Approximation on Decision-Tree Based Multiple Classifier Systems.
Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024

Error Resiliency and Adversarial Robustness in Convolutional Neural Networks: An Empirical Analysis.
Proceedings of the Internet of Things, 2024

Ineffectiveness of Digital Transformations for Detecting Adversarial Attacks Against Quantized and Approximate CNNs.
Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2024

A comprehensive evaluation of interrupt measurement techniques for predictability in safety-critical systems.
Proceedings of the 19th International Conference on Availability, Reliability and Security, 2024

2023
A Catalog-Based AIG-Rewriting Approach to the Design of Approximate Components.
IEEE Trans. Emerg. Top. Comput., 2023

Special Session: Approximation and Fault Resiliency of DNN Accelerators.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Timing Behavior Characterization of Critical Real-Time Systems through Hybrid Timing Analysis.
Proceedings of the 7th International Conference on System Reliability and Safety, 2023

Input-aware accuracy characterization for approximate circuits.
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023

Automatic Test Generation to Improve Scrum for Safety Agile Methodology.
Proceedings of the 18th International Conference on Availability, Reliability and Security, 2023

2022
Scrum for safety: an agile methodology for safety-critical software systems.
Softw. Qual. J., 2022

A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators.
ACM J. Emerg. Technol. Comput. Syst., 2022

A Memory Protection Strategy for Resource Constrained Devices in Safety Critical Applications.
Proceedings of the 6th International Conference on System Reliability and Safety, 2022

2021
Designing Efficient Computing Systems: the Approximate-Computing Breakthrough.
PhD thesis, 2021

Advancing synthesis of decision tree-based multiple classifier systems: an approximate computing case study.
Knowl. Inf. Syst., 2021

Multi-Objective Application-Driven Approximate Design Method.
IEEE Access, 2021

Scrum for Safety: Agile Development in Safety-Critical Software Systems.
Proceedings of the Quality of Information and Communications Technology, 2021

Enforcing Mutual Authentication and Confidentiality in Wireless Sensor Networks Using Physically Unclonable Functions: A Case Study.
Proceedings of the Quality of Information and Communications Technology, 2021

2019
Efficient Reed-Muller Implementation for Fuzzy Extractor Schemes.
Proceedings of the 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2019


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