Shahrzad Mirkhani

According to our database, Shahrzad Mirkhani authored at least 19 papers between 2001 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Computational Storage For Big Data Analytics.

Balavinayagam Samynathan, Keith Chapman, Mehdi Nik, Behnam Robatmili, Shahrzad Mirkhani, Maysam Lavasani

Proceedings of the 10th International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures, 2019

2018

Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience).

Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

2017

Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights.

Eric Cheng, Jacob A. Abraham, Pradip Bose, Alper Buyuktosunoglu, Keith A. Campbell, Deming Chen, Chen-Yong Cher, Hyungmin Cho, Binh Q. Le, Klas Lilja, Shahrzad Mirkhani, Kevin Skadron, Mircea Stan, Lukasz G. Szafaryn, Christos Vezyrtzis, Subhasish Mitra

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

2016

Clear: c̲ross-l̲ayer e̲xploration for a̲rchitecting r̲esilience combining hardware and software techniques to tolerate soft errors in processor cores.

Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

In-depth soft error vulnerability analysis using synthetic benchmarks.

Shahrzad Mirkhani, Balavinayagam Samynathan, Jacob A. Abraham

Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

Efficient soft error vulnerability estimation of complex designs.

Shahrzad Mirkhani, Subhasish Mitra, Chen-Yong Cher, Jacob A. Abraham

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Fast evaluation of test vector sets using a simulation-based statistical metric.

Shahrzad Mirkhani, Jacob A. Abraham

Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

EAGLE: A regression model for fault coverage estimation using a simulation based metric.

Shahrzad Mirkhani, Jacob A. Abraham

Proceedings of the 2014 International Test Conference, 2014

Rethinking error injection for effective resilience.

Shahrzad Mirkhani, Hyungmin Cho, Subhasish Mitra, Jacob A. Abraham

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

Quantitative evaluation of soft error injection techniques for robust system design.

Hyungmin Cho, Shahrzad Mirkhani, Chen-Yong Cher, Jacob A. Abraham, Subhasish Mitra

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

FALCON: Rapid statistical fault coverage estimation for complex designs.

Shahrzad Mirkhani, Jacob A. Abraham, Toai Vo, Hong Shin Jun, Bill Eklow

Proceedings of the 2012 IEEE International Test Conference, 2012

2007

RT level reliability enhancement by constructing dynamic TMRS.

Naghmeh Karimi, Shahrzad Mirkhani, Zainalabedin Navabi, Fabrizio Lombardi

Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

A Configurable Transaction Level Model of a Generic Interconnection Part of Embedded Systems Used in an ESL Design Library.

Parisa Razaghi, Shahrzad Mirkhani, Zainalabedin Navabi

Proceedings of the Forum on specification and Design Languages, 2007

2006

ESTA: An Efficient Method for Reliability Enhancement of RT-Level Designs.

Naghmeh Karimi, Shahrzad Mirkhani, Zainalabedin Navabi

Proceedings of the 15th Asian Test Symposium, 2006

2005

Enhancing Fault Simulation Performance by Dynamic Fault Clustering.

Shahrzad Mirkhani, Zainalabedin Navabi

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2004

Using RT Level Component Descriptions for Single Stuck-at Hierarchical Fault Simulation.

Zainalabedin Navabi, Shahrzad Mirkhani, Meisam Lavasani, Fabrizio Lombardi

J. Electron. Test., 2004

2002

Hierarchical Fault Simulation Using Behavioral and Gate Level Hardware Models.

Shahrzad Mirkhani, Meisam Lavasani, Zainalabedin Navabi

Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002

2001

Adaptation of an event-driven simulation environment to sequentially propagated concurrent fault simulation.

Mina Zolfy, Shahrzad Mirkhani, Zainalabedin Navabi

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Fault Simulation for VHDL Based Test Bench and BIST Evaluation.

Hamed Farshbaf, Mina Zolfy, Shahrzad Mirkhani, Zainalabedin Navabi

Proceedings of the 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, 2001