Shu-Meng Yang
According to our database1,
Shu-Meng Yang
authored at least 8 papers
between 2009 and 2015.
Collaborative distances:
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Bibliography
2015
Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
2013
Low-Voltage Embedded NAND-ROM Macros Using Data-Aware Sensing Reference Scheme for VDDmin, Speed and Power Improvement.
IEEE J. Solid State Circuits, 2013
A Sub-0.3 V Area-Efficient L-Shaped 7T SRAM With Read Bitline Swing Expansion Schemes Based on Boosted Read-Bitline, Asymmetric-V<sub>TH</sub> Read-Port, and Offset Cell VDD Biasing Techniques.
IEEE J. Solid State Circuits, 2013
2012
A 260mV L-shaped 7T SRAM with bit-line (BL) Swing expansion schemes based on boosted BL, asymmetric-VTH read-port, and offset cell VDD biasing techniques.
Proceedings of the Symposium on VLSI Circuits, 2012
A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2010
Noise-Immune Embedded NAND-ROM Using a Dynamic Split Source-Line Scheme for VDDmin and Speed Improvements.
IEEE J. Solid State Circuits, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
Analysis and Reduction of Supply Noise Fluctuations Induced by Embedded Via-Programming ROM.
IEEE Trans. Very Large Scale Integr. Syst., 2009