Suk-Soo Pyo
According to our database1,
Suk-Soo Pyo
authored at least 7 papers
between 2009 and 2023.
Collaborative distances:
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Bibliography
2023
Proceedings of the IEEE International Test Conference, 2023
2020
A 14.7Mb/mm<sup>2</sup> 28nm FDSOI STT-MRAM with Current Starved Read Path, 52Ω/Sigma Offset Voltage Sense Amplifier and Fully Trimmable CTAT Reference.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
28-nm 1T-1MTJ 8Mb 64 I/O STT-MRAM with symmetric 3-section reference structure and cross-coupled sensing amplifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2012
A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2009
45nm Low-power Embedded Pseudo-SRAM with ECC-based Auto-adjusted Self-refresh Scheme.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009