Tobias Becker

Orcid: 0000-0001-5939-6757

According to our database1, Tobias Becker authored at least 58 papers between 2004 and 2021.

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Bibliography

2021
Analytical Performance Estimation for Large-Scale Reconfigurable Dataflow Platforms.
ACM Trans. Reconfigurable Technol. Syst., 2021

2020
Performance Portable FPGA Design.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020


2019
LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing.
CoRR, 2019

Low Area Overhead Custom Buffering for FFT.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

2018
EXA2PRO programming environment: architecture and applications.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018


Container-Based Virtualization for Heterogeneous HPC Clouds: Insights from the EU H2020 CloudLightning Project.
Proceedings of the 2018 IEEE International Conference on Cloud Engineering, 2018

Performance Estimation for Exascale Reconfigurable Dataflow Platforms.
Proceedings of the International Conference on Field-Programmable Technology, 2018


2017
AEGLE's Cloud Infrastructure for Resource Monitoring and Containerized Accelerated Analytics.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

A Scalable Dataflow Implementation of Curran's Approximation Algorithm.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Cloud Deployment and Management of Dataflow Engines.
Proceedings of the 1st International Workshop on Next generation of Cloud Architectures, 2017

An open reconfigurable research platform as stepping stone to exascale high-performance computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

From exaflop to exaflow.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Rapid Development of Gzip with MaxJ.
Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017

2016
Self-aware Hardware Acceleration of Financial Applications on a Heterogeneous Cluster.
Proceedings of the Self-aware Computing Systems - An Engineering Approach, 2016

Fingerprinting Mobile Devices Using Personalized Configurations.
Proc. Priv. Enhancing Technol., 2016

EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016

Configure, Generate, Run - Model-based Development for Big Data Processing.
Proceedings of the European Project Space on Intelligent Technologies, 2016

Quality of Service Driven Runtime Resource Allocation in Reconfigurable HPC Architectures.
Proceedings of the 2016 IEEE Intl Conference on Computational Science and Engineering, 2016


Spatial Programming with OpenSPL.
Proceedings of the FPGAs for Software Programmers, 2016

2015
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration.
Microprocess. Microsystems, 2015

Network-Level FPGA Acceleration of Low Latency Market Data Feed Arbitration.
IEICE Trans. Inf. Syst., 2015


Relocation-Aware Floorplanning for Partially-Reconfigurable FPGA-Based Systems.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015

EXTRA: Towards an Efficient Open Platform for Reconfigurable High Performance Computing.
Proceedings of the 18th IEEE International Conference on Computational Science and Engineering, 2015

2014
Introduction to the TRETS Special Section on the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS'12).
ACM Trans. Reconfigurable Technol. Syst., 2014

Automating Optimization of Reconfigurable Designs.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

Low latency FPGA acceleration of market data feed arbitration.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014

Effective Reconfigurable Design: The FASTER Approach.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
A framework for effective exploitation of partial reconfiguration in dataflow computing.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

Parametric Optimization of Reconfigurable Designs Using Machine Learning.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

2012
Modelling reconfigurable systems in event driven simulation.
SIGARCH Comput. Archit. News, 2012

Smart technologies for effective reconfiguration: The FASTER approach.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

Prioritisation of Simulation Models for Ensuring Safety and Security in Underground Stations on the Basis of a Detailed Requirements Analysis.
Proceedings of the Future Security - 7th Security Research Conference, 2012

Optimising explicit finite difference option pricing for dynamic constant reconfiguration.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Novel Design Methods and a Tool Flow for Unleashing Dynamic Reconfiguration.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

EPiCS: Engineering Proprioception in Computing Systems.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

2011
Optimising and evaluating designs for reconfigurable hardware.
PhD thesis, 2011

Effiziente Entscheidungsunterstützung im Krisenfall durch interaktive Standard Operating Procedures.
Proceedings of the Software Engineering 2011, 2011

Dynamic Constant Reconfiguration for Explicit Finite Difference Option Pricing.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Improving Scheduling Techniques in Heterogeneous Systems with Dynamic, On-Line Optimisations.
Proceedings of the International Conference on Complex, 2011

2010
Benchmarking and evaluating reconfigurable architectures targeting the mobile domain.
ACM Trans. Design Autom. Electr. Syst., 2010

Power Characterisation for Fine-Grain Reconfigurable Fabrics.
Int. J. Reconfigurable Comput., 2010

Automated placement of reconfigurable regions for relocatable modules.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Räumungsszenarien bei Großveranstaltungen: Modellierung einer Datenbasis für Planung und Forschung.
Proceedings of the 40. Jahrestagung der Gesellschaft für Informatik, Service Science - Neue Perspektiven für die Informatik, INFORMATIK 2010, Leipzig, Germany, September 27, 2010

Information fusion based on graph analysis during Urban Search and Rescue.
Proceedings of the 13th Conference on Information Fusion, 2010

Energy-Aware Optimisation for Run-Time Reconfiguration.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

2009
Benchmarking Reconfigurable Architectures in the Mobile Domain.
Proceedings of the FCCM 2009, 2009

Parametric Design for Reconfigurable Software-Defined Radio.
Proceedings of the Reconfigurable Computing: Architectures, 2009

2008
Towards benchmarking energy efficiency of reconfigurable architectures.
Proceedings of the FPL 2008, 2008

2007
Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006
Incremental elaboration for run-time reconfigurable hardware designs.
Proceedings of the 2006 International Conference on Compilers, 2006

2005
Modular Partial Reconfiguration in Virtex FPGAs.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004


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