Xingyu Meng

This page is a disambiguation page, it actually contains multiple papers from persons of the same or a similar name.

Bibliography

2026
AiLO: A Predictive Framework for Logic Optimization Using Multi-Scale Cross-Attention Transformer.
ACM Trans. Design Autom. Electr. Syst., July, 2026

A Survey of Machine Learning Approaches in Logic Synthesis.
ACM Trans. Design Autom. Electr. Syst., March, 2026

Spatio-temporal semantic alignment leveraging human structural priors for text-to-video person retrieval.
Inf. Sci., 2026

2025
BoolSkeleton: Boolean Network Skeletonization via Homogeneous Pattern Reduction.
CoRR, November, 2025

OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2025

Uni-ISP: Toward Unifying the Learning of ISPs From Multiple Mobile Cameras.
IEEE Trans. Image Process., 2025

2024
System-on-Chip Information Flow Validation Under Asynchronous Resets.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2024

Uni-ISP: Unifying the Learning of ISPs from Multiple Cameras.
CoRR, 2024

A Needle in the Haystack: Inspecting Circuit Layout to Identify Hardware Trojans.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

A Solution for EEG Acquisition Device Based on ESP32-S3 and LH7909.
Proceedings of the 2024 8th International Conference on Electronic Information Technology and Computer Engineering, 2024

NSPG: Natural language Processing-based Security Property Generator for Hardware Security Assurance.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Circuit Topology-Aware Vaccination-Based Hardware Trojan Detection.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023

SeVNoC: Security Validation of System-on-Chip Designs With NoC Fabrics.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023

Unlocking Hardware Security Assurance: The Potential of LLMs.
CoRR, 2023

2022
RTL-ConTest: Concolic Testing on RTL for Detecting Security Vulnerabilities.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Explainable Machine Learning for Intrusion Detection via Hardware Performance Counters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Semi-formal Information Flow Validation for Analyzing Secret Asset Propagation in COTS IC Integrated Systems.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021
Two Sides of the Same Coin: Boons and Banes of Machine Learning in Hardware Security.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021

Application of Machine Learning in Hardware Trojan Detection.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Can Overclocking Detect Hardware Trojans?
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

SoCCAR: Detecting System-on-Chip Security Violations Under Asynchronous Resets.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021


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