Yen-Hsiang Huang
Orcid: 0000-0003-0116-1351
According to our database1,
Yen-Hsiang Huang
authored at least 10 papers
between 2019 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
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On csauthors.net:
Bibliography
2024
15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 10<sup>12</sup> Write Endurance and Integrated Margin-Expansion Schemes.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
Design and Development of a Low-Power Wireless MEMS Lead-Free Piezoelectric Accelerometer System.
IEEE Trans. Instrum. Meas., 2023
8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices.
IEEE J. Solid State Circuits, 2023
Proceedings of the 2023 International Symposium on Physical Design, 2023
2022
An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
3Φ4W Grid-Connected Hybrid-Frequency Parallel Inverter System With Ripple Compensation to Achieve Fast Response and Low Current Distortion.
IEEE Trans. Ind. Electron., 2021
A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
2019
SPWM-Based Direct Digital Control With Average-Voltage Model and D-Σ Process for Paralleled 3φ3W Grid-Connected Converters to Reduce Circulating Currents.
IEEE Trans. Ind. Electron., 2019
Team NCTU: Toward AI-Driving for Autonomous Surface Vehicles - From Duckietown to RobotX.
CoRR, 2019