Moritz Brunion

Orcid: 0000-0001-7842-7774

According to our database1, Moritz Brunion authored at least 8 papers between 2021 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023

On Legalization of Die Bonding Bumps and Pads for 3D ICs.
Proceedings of the 2023 International Symposium on Physical Design, 2023

Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs).
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Design Enablement of 3-Dies Stacked 3D-ICs Using Fine-Pitch Hybrid-Bonding and TSVs.
Proceedings of the IEEE International 3D Systems Integration Conference, 2023

2022
Thermal Performance Analysis of Mempool RISC-V Multicore SoC.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021


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