Zhengbin Pang

According to our database1, Zhengbin Pang authored at least 31 papers between 2007 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
Integrated High-Speed Optical SerDes over 100GBd Based on Optical Time Division Multiplexing.
JETC, 2018

RSON: An inter/intra-chip silicon photonic network for rack-scale computing systems.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
MOCA: an Inter/Intra-Chip Optical Network for Memory.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
An Area-Efficient DAMQ Buffer with Congestion Control Support.
Journal of Circuits, Systems, and Computers, 2016

The Efficient In-band Management for Interconnect Network in Tianhe-2 System.
Proceedings of the 24th Euromicro International Conference on Parallel, 2016

2015
High Performance Interconnect Network for Tianhe System.
J. Comput. Sci. Technol., 2015

A low-latency fine-grained dynamic shared cache management scheme for chip multi-processor.
Proceedings of the 34th IEEE International Performance Computing and Communications Conference, 2015

2014
An incentive compatible reputation mechanism for P2P systems.
The Journal of Supercomputing, 2014

The TH Express high performance interconnect networks.
Frontiers Comput. Sci., 2014

Selective Extension of Routing Algorithms Based on Turn Model.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

Low-latency last-level cache structure based on grouped cores in Chip Multi-Processor.
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014

A Low Overhead Last-Write-Touch Prediction Scheme.
Proceedings of the IEEE 12th International Conference on Dependable, 2014

Fast NIC based RDMA implementation for adaptive unreliable networks.
Proceedings of the 11th IEEE/ACS International Conference on Computer Systems and Applications, 2014

2013
Fine-Grained Location-Free Planarization in Wireless Sensor Networks.
IEEE Trans. Mob. Comput., 2013

An Effective Framework of Program Optimization for High Performance Computing.
Proceedings of the Computer Engineering and Technology - 17th CCF Conference, 2013

A Highly-Efficient Approach to Adaptive Load Balance for Scalable TBGP.
Proceedings of the Computer Engineering and Technology - 17th CCF Conference, 2013

Combining Program Analysis and Empirical Search to Optimize Programs.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications & 2013 IEEE International Conference on Embedded and Ubiquitous Computing, 2013

Scalable NIC Architecture to Support Offloading of Large Scale MPI Barrier.
Proceedings of the Advanced Parallel Processing Technologies, 2013

2012
Inferring Assertion for Complementary Synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2012

Adaptive Bubble Scheme with Minimal Buffers in Torus Networks.
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

Optimizing Private Memory Performance by Dynamically Deactivating Cache Coherence.
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

PIM: A Policy-Based Incentive Mechanism for Promoting Honest Recommendations in Reputation Systems.
Proceedings of the 12th IEEE International Conference on Computer and Information Technology, 2012

2011
Finding First-Order Minimal Unsatisfiable Cores with a Heuristic Depth-First-Search Algorithm.
Proceedings of the Intelligent Data Engineering and Automated Learning - IDEAL 2011, 2011

A Parallel Processing Scheme for Large-Size Sliding-Window Applications.
Proceedings of the 13th IEEE International Conference on High Performance Computing & Communication, 2011

2009
A Reconfigurable Architecture for Rotation Invariant Multi-View Face Detection Based on a Novel Two-Stage Boosting Method.
EURASIP J. Adv. Sig. Proc., 2009

DTM: Decoupled Hardware Transactional Memory to Support Unbounded Transaction and Operating System.
Proceedings of the ICPP 2009, 2009

2008
Lowering the Overhead of Hybrid Transactional Memory with Transact Cache.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

Efficient Verification of Parameterized Cache Coherence Protocols.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

A GPDMA-based Distributed Shared I/O Solution for CC-NUMA System.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

Software Assisted Transact Cache to Support Efficient Unbounded Transactional Memory.
Proceedings of the 10th IEEE International Conference on High Performance Computing and Communications, 2008

2007
Exploring Data Reusing of Failed Transaction.
Proceedings of the Advanced Parallel Processing Technologies, 7th International Symposium, 2007


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