Aman Arora

Orcid: 0000-0003-2547-4424

Affiliations:
  • Arizona State University, School of Computing and Augmented Intelligence (SCAI), Tempe, AZ, USA
  • University of Texas at Austin, Austin, TX, USA (former, PhD 2023)


According to our database1, Aman Arora authored at least 43 papers between 2020 and 2025.

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Bibliography

2025
CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUs.
CoRR, June, 2025

GAMA: High-Performance GEMM Acceleration on AMD Versal ML-Optimized AI Engines.
CoRR, April, 2025

SAF: Scalable Acceleration Framework for dynamic and flexible scaling of FPGAs.
CoRR, March, 2025

Performance Analysis of GEMM Workloads on the AMD Versal Platform.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2025

CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUs.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration.
Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2025

Performance Analysis of GEMM Workloads on the AMD Versal Platform.
Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2025

High Throughput Low Latency Network Intrusion Detection on FPGAs: A Raw Packet Approach.
Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2025

Analog In-Memory Computing Enhanced FPGA for High-Throughput and Energy-Efficient Acceleration.
Proceedings of the 33rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2025

Compute-In-Memory on FPGAs for Deep Learning: A Review.
Proceedings of the 33rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2025

Out-of-the-Box Performance of FPGAs for ML Workloads Using Vitis AI.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2025

2024
PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware Computation.
ACM Trans. Archit. Code Optim., December, 2024

Field-Programmable Gate Array Architecture for Deep Learning: Survey & Future Directions.
CoRR, 2024

LogicNets vs. ULEEN : Comparing two novel high throughput edge ML inference techniques on FPGA.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond.
Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, 2024

Beyond the Surface: The Necessity for Detailed Metrics in Corporate Sustainability Reports.
Proceedings of the 15th IEEE International Green and Sustainable Computing Conference, 2024

Cross-FPGA Power Estimation from High Level Synthesis via Transfer-Learning.
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

Efficient Approaches for GEMM Acceleration on Leading AI-Optimized FPGAs.
Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

GreenFPGA: Evaluating FPGAs as Environmentally Sustainable Computing Solutions.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
ULEEN: A Novel Architecture for Ultra-low-energy Edge Neural Networks.
ACM Trans. Archit. Code Optim., December, 2023

Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD Research.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

CoMeFa: Deploying Compute-in-Memory on FPGAs for Deep Learning Acceleration.
ACM Trans. Reconfigurable Technol. Syst., September, 2023

PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware Computation.
CoRR, 2023

HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis.
CoRR, 2023

MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine.
Proceedings of the International Conference on Field Programmable Technology, 2023

An FPGA-Based Weightless Neural Network for Edge Network Intrusion Detection.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

Infinity Stream: Portable and Programmer-Friendly In-/Near-Memory Fusion.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level Synthesis.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

COIN: Combinational Intelligent Networks.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

2022
Tensor Slices: FPGA Building Blocks For The Deep Learning Era.
ACM Trans. Reconfigurable Technol. Syst., 2022

LogGen: A Parameterized Generator for Designing Floating-Point Logarithm Units for Deep Learning.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Hardware-aware 3D Model Workload Selection and Characterization for Graphics and ML Applications.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

MathRAMs: Configurable Fused Compute-Memory Blocks for FPGAs.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022

CoMeFa: Compute-in-Memory Blocks for FPGAs.
Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022


LogicWiSARD: Memoryless Synthesis of Weightless Neural Networks.
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022

Weightless Neural Networks for Efficient Edge Inference.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2021
Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD Research.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Tensor Slices to the Rescue: Supercharging ML Acceleration on FPGAs.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

Compute RAMs: Adaptable Compute and Storage Blocks for DL-Optimized FPGAs.
Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021

2020
The Case for Hard Matrix Multiplier Blocks in an FPGA.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Design Space Exploration for Softmax Implementations.
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020

Hamamu: Specializing FPGAs for ML Applications by Adding Hard Matrix Multiplier Blocks.
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020


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