Chin-Hua Wen

According to our database, Chin-Hua Wen authored at least 3 papers between 2010 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

A 4-to-18GHz Active Poly Phase Filter Quadrature Clock Generator with Phase Error Correction in 5nm CMOS.

Wei-Chih Chen, Chin-Hua Wen, Chin-Ming Fu, Tsung-Hsien Tsai, Yu-Chi Chen, Wen-Hung Huang, Chien-Chun Tsai, Alvin Leng Sun Loke, C. H. Kenny

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2016

A sub-micron CMOS-based ISFET array for biomolecular sensing.

Yu-Han Sun, Guan-Yin Chen, Chih-Ting Lin, Jui-Cheng Huang, Yu-Jie Huang, Chin-Hua Wen

Proceedings of the 11th IEEE Annual International Conference on Nano/Micro Engineered and Molecular Systems, 2016

2010

A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology.

Wei-Chih Chen, Chien-Chun Tsai, Chih-Hsien Chang, Yung-Chow Peng, Fu-Lung Hsueh, Tsung-Hsin Yu, Jinn-Yeh Chien, Wen-Hung Huang, Chi-Chang Lu, Mu-Shan Lin, Chin-Ming Fu, Shu-Chun Yang, Chung-Wing Wong, Wan-Te Chen, Chin-Hua Wen, Li Yueh Wang, Chiang Pu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010