Christophe Muller

According to our database1, Christophe Muller authored at least 20 papers between 2004 and 2014.

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Bibliography

2014
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories.
IEEE Trans. on Circuits and Systems, 2014

Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells.
J. Parallel Distrib. Comput., 2014

2013
A novel test structure for OxRRAM process variability evaluation.
Microelectronics Reliability, 2013

Synchronous full-adder based on complementary resistive switching memory cells.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Analytical study of complementary memristive synchronous logic gates.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2013

SPICE level analysis of Single Event Effects in an OxRRAM cell.
Proceedings of the 14th Latin American Test Workshop, 2013

A hybrid CBRAM/CMOS Look-Up-Table structure for improving performance efficiency of Field-Programmable-Gate-Array.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A CBRAM-based compact interconnect switch for non-volatile reconfigurable logic circuits.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

2012
Non-Volatile Flip-Flop Based on Unipolar ReRAM for Power-Down Applications.
J. Low Power Electronics, 2012

Multidimensional inequality comparisons: A compensation perspective.
J. Economic Theory, 2012

Models for Identification of Erroneous Atom-to-Atom Mapping of Reactions Performed by Automated Algorithms.
Journal of Chemical Information and Modeling, 2012

Bipolar ReRAM Based non-volatile flip-flops for low-power architectures.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Crossbar architecture based on 2R complementary resistive switching memory cell.
Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012

2011
Using OxRRAM memories for improving communications of reconfigurable FPGA architectures.
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011

Bipolar OxRRAM memory array reliability evaluation based on fault injection.
Proceedings of the 6th IEEE International Design and Test Workshop, 2011

Design challenges for prototypical and emerging memory concepts relying on resistance switching.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
Applicability Domains for Classification Problems: Benchmarking of Distance to Models for Ames Mutagenicity Set.
Journal of Chemical Information and Modeling, 2010

2009
Design and Test Challenges in Resistive Switching RAM (ReRAM): An Electrical Model for Defect Injections.
Proceedings of the 14th IEEE European Test Symposium, 2009

2008
Emerging Concepts in Non-volatile Memory Technologies - Era of Resistance Switching Memories.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2004
Stockage haute densité : une nécessité pour l'informatique, un défi pour la microélectronique.
Proceedings of the 20èmes Journées Bases de Données Avancées, 2004


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