Christian W. Baks

According to our database1, Christian W. Baks authored at least 26 papers between 2005 and 2020.

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Bibliography

2020
A 250-mW 60-GHz CMOS Transceiver SoC Integrated With a Four-Element AiP Providing Broad Angular Link Coverage.
IEEE J. Solid State Circuits, 2020

A Monolithically Integrated Silicon Photonics 8×8 Switch in 90nm SOI CMOS.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

An 8×8 Silicon Photonic Switch Module with Nanosecond-Scale Reconfigurability.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2020

2019
Toward Optical Networks using Rapid Amplified Multi-Wavelength Photonic Switches.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

A Nonblocking 4×4 Mach-Zehnder Switch with Integrated Gain and Nanosecond-Scale Reconfiguration Time.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

2018
A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver With Low-Latency Digital CDR in 14-nm CMOS FinFET.
IEEE J. Solid State Circuits, 2018

Antenna-in-package design and module integration for millimeter-wave communication and 5G.
Proceedings of the 2018 International Symposium on VLSI Design, 2018

FEC-Free 60-Gb/s Silicon Photonic Link Using SiGe-Driver ICs Hybrid-Integrated with Photonics-Enabled CMOS.
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

System-Level Demonstration of a Dynamically Reconfigured Burst-Mode Link Using a Nanosecond Si-Photonic Switch.
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

2017
A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET.
IEEE J. Solid State Circuits, 2017

Driver-integrated 56-Gb/s segmented electrode silicon Mach Zehnder modulator using optical-domain equalization.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017

2016

2015
A 25 Gb/s Burst-Mode Receiver for Low Latency Photonic Switch Networks.
IEEE J. Solid State Circuits, 2015

A 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology.
IEEE J. Solid State Circuits, 2015

A WDM 4×28Gbps integrated silicon photonic transmitter driven by 32nm CMOS driver ICs.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

A WDM-Compatible 4 × 32-Gb/s CMOS-driven electro-absorption modulator array.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

22.1 A 25Gb/s burst-mode receiver for rapidly reconfigurable optical networks.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

64Gb/s transmission over 57m MMF using an NRZ modulated 850nm VCSEL.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2014

30Gbps optical link utilizing heterogeneously integrated III-V/Si photonics and CMOS circuits.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2014

Exploring the limits of high-speed receivers for multimode VCSEL-based optical links.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2014

A 1.4-pJ/b, power-scalable 16×12-Gb/s source-synchronous I/O with DFE receiver in 32nm SOI CMOS technology.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2012
Electrical Performance of the Recessed Probe Launch Technique for Measurement of Embedded Multilayer Structures.
IEEE Trans. Instrum. Meas., 2012

2009
Low-Power 16 x 10 Gb/s Bi-Directional Single Chip CMOS Optical Transceivers Operating at ≪ 5 mW/Gb/s/link.
IEEE J. Solid State Circuits, 2009

2008
A ≪5mW/Gb/s/link, 16×10Gb/s Bi-Directional Single-Chip CMOS Optical Transceiver for Board-Level Optical Interconnects.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2005
Three dimensional silicon integration using fine pitch interconnection, silicon processing and silicon carrier packaging technology.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005


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