Mehmet Soyuer

According to our database1, Mehmet Soyuer authored at least 18 papers between 1995 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2016, "For contributions to the design of high-frequency integrated circuits for clocking and communications".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links.
IEEE J. Solid State Circuits, 2023

2022


2006
A Silicon 60-GHz Receiver and Transmitter Chipset for Broadband Communications.
IEEE J. Solid State Circuits, 2006

2003
SiGe BiCMOS integrated circuits for high-speed serial communication links.
IBM J. Res. Dev., 2003

A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2001
Silicon-germanium BiCMOS technology and a CAD environment for 2-40 GHz VLSI mixed-signal ICs.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000
Low-power multi-GHz and multi-Gb/s SiGe BiCMOS circuits.
Proc. IEEE, 2000

SiGe BiCMOS 3.3-V clock and data recovery circuits for 10-Gb/s serial transmission systems.
IEEE J. Solid State Circuits, 2000

1999
A 5.2 GHz 3.3 V I/Q SiGe RF transceiver.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1998
RF circuit design aspects of spiral inductors on silicon.
IEEE J. Solid State Circuits, 1998

1997
An 11 GHz 3-V SiGe voltage controlled oscillator with integrated resonator.
IEEE J. Solid State Circuits, 1997

Integrated RF components in a SiGe bipolar technology.
IEEE J. Solid State Circuits, 1997

1996
Single-chip 4×500-MBd CMOS transceiver.
IEEE J. Solid State Circuits, 1996

A 3-V 4-GHz nMOS voltage-controlled oscillator with integrated resonator.
IEEE J. Solid State Circuits, 1996

A 2.4-GHz silicon bipolar oscillator with integrated resonator.
IEEE J. Solid State Circuits, 1996

1995
CMOS circuits for Gb/s serial data communication.
IBM J. Res. Dev., 1995

A 1.6-Gb/s CMOS Phase-Frequency Locked Loop for Timing Recovery.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995


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