Ernesto Villegas Castillo

According to our database, Ernesto Villegas Castillo authored at least 14 papers between 2014 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Reliability Assessment of Deep Neural Networks and Accelerators Across Design Stages.

Mohammad Hasan Ahmadilivani, Natalia Cherezova, Michael Glaß, Juan-David Guerrero-Balaguera, Maksim Jenihhin, Angeliki Kritikakou, Robert Limas Sierra, Letícia Maria Veiras Bolzani Poehls, Jaan Raik, Lucas Roquet, Fernando Fernandes dos Santos, Felipe Augusto da Silva, Matteo Sonza Reorda, Alessandro Veronesi, Ernesto Cristopher Villegas Castillo, Josie E. Rodriguez Condia

Proceedings of the 27th IEEE Latin American Test Symposium, 2026

A Predictive Framework for Fault Vulnerabilities in Edge Hardware Accelerators.

Ernesto Cristopher Villegas Castillo, Josie E. Rodriguez Condia, Juan-David Guerrero-Balaguera, Felipe Augusto da Silva, Michael Glaß

Proceedings of the 17th IEEE Latin America Symposium on Circuits and System, 2026

Early Safety Analysis of Software Test Libraries for Automotive SoCs Based on Virtual Prototyping.

Ernesto Cristopher Villegas Castillo, Carlos Silva Cárdenas, Michael Glaß

Proceedings of the 17th IEEE Latin America Symposium on Circuits and System, 2026

Validation of the NVDLA Architecture via AWS-Based FPGA Co-Simulation Using the Alexnet Model.

David Freidenson Bejar, Mario Raffo-Jara, Ernesto Cristopher Villegas Castillo

Proceedings of the 17th IEEE Latin America Symposium on Circuits and System, 2026

2025

Early Reliability Estimation in Hardware Accelerators using Improved Colored Petri Nets.

Ernesto Cristopher Villegas Castillo, Felipe Augusto da Silva, Josie E. Rodriguez Condia, Juan-David Guerrero-Balaguera, Michael Glaß

Proceedings of the IEEE International Test Conference, 2025

Enabling Gem5 for Side-Channel Power Attack Simulation of Cryptographic Algorithms.

Christian Appold, Yong Hu, Ernesto Cristopher Villegas Castillo, Hans-Martin Bluethgen, Tim Leinmüller

Proceedings of the 14th International Workshop on Hardware and Architectural Support for Security and Privacy, 2025

2024

Diagnostic Coverage Estimation for Automotive SoCs Based on Colored Stochastic Petri Nets.

Ernesto Cristopher Villegas Castillo, Felipe Augusto da Silva, Michael Glaß

Proceedings of the 32nd IFIP/IEEE International Conference on Very Large Scale Integration, 2024

An Efficient Approach for STLs Development of Automotive SoCs Using Colored Petri Nets.

Ernesto Cristopher Villegas Castillo, Felipe Augusto da Silva, Michael Glaß

Proceedings of the 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems, 2024

2023

Evaluating the Hardware Performance Counters of an Xtensa Virtual Prototype.

Adebayo Omotosho, Sirine Ilahi, Ernesto Cristopher Villegas Castillo, Christian Hammer, Christian Sauer

Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

2019

A Dependency-Free Real-Time UHD Architecture for the Initial Stage of HEVC Motion Estimation.

Haris Chaudhry, Mario Raffo-Jara, Carlos Silva Cárdenas, Ernesto Cristopher Villegas Castillo

Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

2016

A highly parallel 4K real-time HEVC fractional motion estimation architecture for FPGA implementation.

Jorge Soto Leon, Carlos Silva Cárdenas, Ernesto Cristopher Villegas Castillo

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

Dynamically Reconfigurable NoC using a deadlock-free flexible routing algorithm with a low hardware implementation cost.

Ernesto Villegas Castillo, Jiang Chau Wang, Gabriele Miorandi, Davide Bertozzi

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

DyAFNoC: Dynamically Reconfigurable NoC Characterization Using a Simple Adaptive Deadlock-Free Routing Algorithm with a Low Implementation Cost.

Ernesto Villegas Castillo, Gabriele Miorandi, Davide Bertozzi, Jiang Chau Wang

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014

DyAFNoC: Characterization and analysis of a dynamically reconfigurable NoC using a DOR-based deadlock-free routing algorithm.

Ernesto Villegas Castillo, Gabriele Miorandi, Jiang Chau Wang

Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014