Ernesto Villegas Castillo

According to our database, Ernesto Villegas Castillo authored at least 5 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Evaluating the Hardware Performance Counters of an Xtensa Virtual Prototype.

Adebayo Omotosho, Sirine IIahi, Ernesto Cristopher Villegas Castillo, Christian Hammer, Christian Sauer

Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

2016

A highly parallel 4K real-time HEVC fractional motion estimation architecture for FPGA implementation.

Jorge Soto Leon, Carlos Silva Cárdenas, Ernesto Cristopher Villegas Castillo

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

Dynamically Reconfigurable NoC using a deadlock-free flexible routing algorithm with a low hardware implementation cost.

Ernesto Villegas Castillo, Jiang Chau Wang, Gabriele Miorandi, Davide Bertozzi

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

DyAFNoC: Dynamically Reconfigurable NoC Characterization Using a Simple Adaptive Deadlock-Free Routing Algorithm with a Low Implementation Cost.

Ernesto Villegas Castillo, Gabriele Miorandi, Davide Bertozzi, Jiang Chau Wang

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014

DyAFNoC: Characterization and analysis of a dynamically reconfigurable NoC using a DOR-based deadlock-free routing algorithm.

Ernesto Villegas Castillo, Gabriele Miorandi, Jiang Chau Wang

Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014