Josie E. Rodriguez Condia

IEEE Des. Test, August, 2023

Using STLs for Effective In-Field Test of GPUs.

[BibT_eX]

[DOI]

Felipe Augusto da Silva

Ahmet Çagri Bagbaga

Said Hamdioui

Christian Sauer

IEEE Des. Test, April, 2023

Evaluating the Impact of Transition Delay Faults in GPUs.

[BibT_eX]

[DOI]

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Analyzing the Impact of Different Real Number Formats on the Structural Reliability of TCUs in GPUs.

[BibT_eX]

[DOI]

Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

Functional Testing with STLs: A Step Towards Reliable RISC-V-based HPC Commodity Clusters.

[BibT_eX]

[DOI]

Nikolaos Ioannis Deligiannis

Jacopo Sini

Riccardo Cantoro

Proceedings of the High Performance Computing, 2023

Understanding the Effects of Permanent Faults in GPU's Parallelism Management and Control Units.

[BibT_eX]

[DOI]

Josie Esteban Rodriguez Condia

Proceedings of the International Conference for High Performance Computing, 2023

RISC-V-Based Platforms for HPC: Analyzing Non-functional Properties for Future HPC and Big-Data Clusters.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

Analyzing the Architectural Impact of Transient Fault Effects in SFUs of GPUs.

[BibT_eX]

[DOI]

Edward Javier Patiño Nuñez

Proceedings of the 24th IEEE Latin American Test Symposium, 2023

Reliability Estimation of Split DNN Models for Distributed Computing in IoT Systems.

[BibT_eX]

[DOI]

Ian Harshbarger

Marco Levorato

Proceedings of the 32nd IEEE International Symposium on Industrial Electronics, 2023

Evaluating the Prevalence of SFUs in the Reliability of GPUs.

[BibT_eX]

[DOI]

Edward Javier Patiño Nuñez

Proceedings of the IEEE European Test Symposium, 2023

A Reliability-aware Environment for Design Exploration for GPU Devices.

[BibT_eX]

[DOI]

Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

2022

Evaluating low-level software-based hardening techniques for configurable GPU architectures.

[BibT_eX]

[DOI]

Marcio M. Gonçalves

José Rodrigo Azambuja

J. Supercomput., 2022

Characterizing a Neutron-Induced Fault Model for Deep Neural Networks.

[BibT_eX]

[DOI]

Josie Esteban Rodriguez Condia

Angeliki Kritikakou

Olivier Sentieys

CoRR, 2022

A New Method to Generate Software Test Libraries for In-Field GPU Testing Resorting to High-Level Languages.

[BibT_eX]

[DOI]

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

A Multi-level Approach to Evaluate the Impact of GPU Permanent Faults on CNN's Reliability.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2022

Microarchitectural Reliability Evaluation of a Block Scheduling Controller in GPUs.

[BibT_eX]

[DOI]

Riccardo Faggiano

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Neural Network's Reliability to Permanent Faults: Analyzing the Impact of Performance Optimizations in GPUs.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

A Compaction Method for STLs for GPU in-field test.

[BibT_eX]

[DOI]

Nikolaos Ioannis Deligiannis

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Using Formal Methods to Support the Development of STLs for GPUs.

[BibT_eX]

[DOI]

Tobias Faller

Riccardo Cantoro

Bernd Becker

Proceedings of the IEEE 31st Asian Test Symposium, 2022

2021

DYRE: a DYnamic REconfigurable solution to increase GPGPU's reliability.

[BibT_eX]

[DOI]

Pierpaolo Narducci

J. Supercomput., 2021

Combining Architectural Simulation and Software Fault Injection for a Fast and Accurate CNNs Reliability Evaluation on GPUs.

[BibT_eX]

[DOI]

Proceedings of the 39th IEEE VLSI Test Symposium, 2021

Protecting GPU's Microarchitectural Vulnerabilities via Effective Selective Hardening.

[BibT_eX]

[DOI]

Luigi Carro

Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021

Using Hardware Performance Counters to support infield GPU Testing.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International Conference on Electronics, 2021

Revealing GPUs Vulnerabilities by Combining Register-Transfer and Software-Level Fault Injection.

[BibT_eX]

[DOI]

Luigi Carro

Proceedings of the 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2021

On the Functional Test of Special Function Units in GPUs.

[BibT_eX]

[DOI]

Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

A Novel Compaction Approach for SBST Test Programs.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE Asian Test Symposium, 2021

2020

An On-Line Testing Technique for the Scheduler Memory of a GPGPU.

[BibT_eX]

[DOI]

Stefano Di Carlo

IEEE Access, 2020

A dynamic reconfiguration mechanism to increase the reliability of GPGPUs.

[BibT_eX]

[DOI]

Pierpaolo Narducci

Josie Esteban Rodriguez Condia

Proceedings of the 38th IEEE VLSI Test Symposium, 2020

Modular Functional Testing: Targeting the Small Embedded Memories in GPUs.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: Design Trends, 2020

Testing the Divergence Stack Memory on GPGPUs: A Modular in-Field Test Strategy.

[BibT_eX]

[DOI]

Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

Evaluating Software-based Hardening Techniques for General-Purpose Registers on a GPGPU.

[BibT_eX]

[DOI]

Marcio Gonçalves

José Rodrigo Azambuja

Proceedings of the IEEE Latin-American Test Symposium, 2020

Analyzing the Sensitivity of GPU Pipeline Registers to Single Events Upsets.

[BibT_eX]

[DOI]

Marcio Gonçalves

José Rodrigo Azambuja

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

On the testing of special memories in GPGPUs.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020

A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs.

[BibT_eX]

[DOI]

Pierpaolo Narducci

Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020

2019

On the evaluation of SEU effects in GPGPUs.

[BibT_eX]

[DOI]

Boyang Du

Proceedings of the IEEE Latin American Test Symposium, 2019

Testing permanent faults in pipeline registers of GPGPUs: A multi-kernel approach.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Untestable faults identification in GPGPUs for safety-critical applications.

[BibT_eX]

[DOI]

Felipe Augusto da Silva

Said Hamdioui

Christian Sauer

Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

An extended model to support detailed GPGPU reliability analysis.

[BibT_eX]

[DOI]

Boyang Du

Proceedings of the 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2019

On the in-field test of the GPGPU scheduler memory.

[BibT_eX]

[DOI]

Stefano Di Carlo

Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

2018

About the functional test of the GPGPU scheduler.

[BibT_eX]

[DOI]

Boyang Du