Hamidreza Hashempour

According to our database, Hamidreza Hashempour authored at least 34 papers between 2002 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2022

Fast and Robust LRSD-Based SAR/ISAR Imaging and Decomposition.

Hamidreza Hashempour, Majid Moradikia, Hamed Bastami, Ahmed Abdelhadi, Mojtaba Soltanalian

IEEE Trans. Geosci. Remote. Sens., 2022

Secure SWIPT in STAR-RIS Aided Downlink MISO Rate-Splitting Multiple Access Networks.

Hamidreza Hashempour, Hamed Bastami, Majid Moradikia, Seyed A. Zekavat, Hamid Behroozi, A. Lee Swindlehurst

CoRR, 2022

2021

Video-SAR Imaging of Dynamic Scenes Using Low-Rank and Sparse Decomposition.

Majid Moradikia, Sadegh Samadi, Hamidreza Hashempour, Müjdat Çetin

IEEE Trans. Computational Imaging, 2021

Deep-LfD: Deep robot learning from demonstrations.

Amir Ghalamzan E, Kiyanoush Nazari, Hamidreza Hashempour, Fangxun Zhong

Softw. Impacts, 2021

2020

A data-set of piercing needle through deformable objects for Deep Learning from Demonstrations.

Hamidreza Hashempour, Kiyanoush Nazari, Fangxun Zhong, Amir Ghalamzan E

CoRR, 2020

2017

Inverse synthetic aperture radar phase adjustment and cross-range scaling based on sparsity.

Hamidreza Hashempour, Mohammad Ali Masnadi-Shirazi

Digit. Signal Process., 2017

2012

Defect Oriented Testing for Analog/Mixed-Signal Designs.

Bram Kruseman, Bratislav Tasic, Camelia Hora, Jos Dohmen, Hamidreza Hashempour, Maikel van Beurden, Yizi Xing

IEEE Des. Test Comput., 2012

2011

Defect Oriented Testing for analog/mixed-signal devices.

Bram Kruseman, Bratislav Tasic, Camelia Hora, Jos Dohmen, Hamidreza Hashempour, Maikel van Beurden, Yizi Xing

Proceedings of the 2011 IEEE International Test Conference, 2011

A Schematic-Based Extraction Methodology for Dislocation Defects in Analog/Mixed-Signal Devices.

Nivesh Rai, Hamidreza Hashempour, Yizi Xing, Bram Kruseman, Said Hamdioui

Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

Test time reduction in analogue/mixed-signal devices by defect oriented testing: An industrial example.

Hamidreza Hashempour, Jos Dohmen, Bratislav Tasic, Bram Kruseman, Camelia Hora, Maikel van Beurden, Yizi Xing

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Defect-oriented cell-internal testing.

Friedrich Hapke, Wilfried Redemund, Jürgen Schlöffel, Rene Krenz-Baath, Andreas Glowatz, Michael Wittke, Hamidreza Hashempour, Stefan Eichenberger

Proceedings of the 2011 IEEE International Test Conference, 2010

2009

Modeling and Evaluating Errors Due to Random Clock Shifts in Quantum-Dot Cellular Automata Circuits.

Faizal Karim, Marco Ottavi, Hamidreza Hashempour, Vamsi Vankamamidi, Konrad Walus, André Ivanov, Fabrizio Lombardi

J. Electron. Test., 2009

Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs.

Friedrich Hapke, Rene Krenz-Baath, Andreas Glowatz, Jürgen Schlöffel, Hamidreza Hashempour, Stefan Eichenberger, Camelia Hora, Dan Adolfsson

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

Evaluation and Analysis of Heuristic Techniques for Vector Ordering of VLSI Test Sets.

Hamidreza Hashempour, Fabrizio Lombardi

IEEE Trans. Instrum. Meas., 2008

Device Model for Ballistic CNFETs Using the First Conducting Band.

Hamidreza Hashempour, Fabrizio Lombardi

IEEE Des. Test Comput., 2008

2007

An Integrated Environment for Design Verification of ATE Systems.

Hamidreza Hashempour, Fabrizio Lombardi, Warren Necoechea, Rakesh Mehta, Tim Alton

IEEE Trans. Instrum. Meas., 2007

On the Error Effects of Random Clock Shifts in Quantum-Dot Cellular Automata Circuits.

Marco Ottavi, Hamidreza Hashempour, Vamsi Vankamamidi, Faizal Karim, Konrad Walus, André Ivanov

Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

Circuit-level modeling and detection of metallic carbon nanotube defects in carbon nanotube FETs.

Hamidreza Hashempour, Fabrizio Lombardi

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

A Novel Methodology for Functional Test Data Compression.

Hamidreza Hashempour, Fabrizio Lombardi

Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006

2005

Evaluation, analysis, and enhancement of error resilience for reliable compression of VLSI test data.

Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi

IEEE Trans. Instrum. Meas., 2005

Analysis and evaluation of multisite testing for VLSI.

Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi

IEEE Trans. Instrum. Meas., 2005

Application of Arithmetic Coding to Compression of VLSI Test Data.

Hamidreza Hashempour, Fabrizio Lombardi

IEEE Trans. Computers, 2005

Improving Error Resilience for Compressed Test Sets by Don't Care Assignment.

Hamidreza Hashempour, Fabrizio Lombardi

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Enhancing error resilience for reliable compression of VLSI test data.

Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

Two dimensional reordering of functional test data for compression by ATE.

Hamidreza Hashempour, Fabrizio Lombardi

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

Evaluation of Error-Resilience for Reliable Compression of Test Data.

Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi

Proceedings of the 2005 Design, 2005

2004

Analysis and measurement of fault coverage in a combined ATE and BIST environment.

Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi

IEEE Trans. Instrum. Meas., 2004

Evaluation of heuristic techniques for test vector ordering.

Hamidreza Hashempour, Fabrizio Lombardi

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

Error-Resilient Test Data Compression Using Tunstall Codes.

Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi

Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004

Compression of VLSI Test Data by Arithmetic Coding.

Hamidreza Hashempour, Fabrizio Lombardi

Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004

2003

Hybrid Multisite Testing at Manufacturing.

Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi, Farzin Karimi

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

ATE-Amenable Test Data Compression with No Cyclic Scan.

Hamidreza Hashempour, Fabrizio Lombardi

Proceedings of the 18th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2003), 2003

2002

Test Time Reduction in a Manufacturing Environment by Combining BIST and ATE.

Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi

Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

A Test-Vector Generation Methodology for Crosstalk Noise Faults.

Hamidreza Hashempour, Yong-Bin Kim, Nohpill Park

Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002