Andreas Glowatz

Orcid: 0000-0002-8086-6220

According to our database¹, Andreas Glowatz authored at least 25 papers between 2005 and 2023.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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On csauthors.net:

Bibliography

2023

Measuring Non-Redundant VIA Test-Coverage for Automotive Designs in Lower Process Nodes.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2023

2022

Affordable and Comprehensive Testing of 3-D Stacked Die Devices.

[BibT_eX]

[DOI]

IEEE Des. Test, 2022

2021

Defect-Oriented Test: Effectiveness in High Volume Manufacturing.

[BibT_eX]

[DOI]

Srikanth Venkataraman

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

On Modeling CMOS Library Cells for Cell Internal Fault Test Pattern Generation.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE Asian Test Symposium, 2021

2018

DPPM Reduction Methods and New Defect Oriented Test Methods Applied to Advanced FinFET Technologies.

[BibT_eX]

[DOI]

Will Howell

Friedrich Hapke

Edward Brazil

Srikanth Venkataraman

Proceedings of the IEEE International Test Conference, 2018

2014

Cell-Aware Test.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Cell-aware experiences in a high-quality automotive test suite.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE European Test Symposium, 2014

2013

Fault collapsing of multi-conditional faults.

[BibT_eX]

[DOI]

Rene Krenz-Baath

Andreas Glowatz

Friedrich Hapke

Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012

Cell-aware Production test results from a 32-nm notebook processor.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Test Conference, 2012

Robust Evaluation of Weighted Random Logic BIST Structures in Industrial Designs.

[BibT_eX]

[DOI]

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

A new SAT-based ATPG for generating highly compacted test sets.

[BibT_eX]

[DOI]

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011

Cell-aware analysis for small-delay effects and production test results from different fault models.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2011

2010

MONSOON: SAT-Based ATPG for Path Delay Faults Using Multiple-Valued Logics.

[BibT_eX]

[DOI]

J. Electron. Test., 2010

Defect-oriented cell-internal testing.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2010

2009

Restrict Encoding for Mixed-Mode BIST.

[BibT_eX]

[DOI]

Abdul Wahid Hakmi

Stefan Holst

Hans-Joachim Wunderlich

Jürgen Schlöffel

Friedrich Hapke

Andreas Glowatz

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Using a two-dimensional fault list for compact Automatic Test Pattern Generation.

[BibT_eX]

[DOI]

Proceedings of the 10th Latin American Test Workshop, 2009

Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

On Acceleration of SAT-Based ATPG for Industrial Designs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007

Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults.

[BibT_eX]

[DOI]

Proceedings of the 5th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2007), May 30, 2007

Programmable deterministic Built-In Self-Test.

[BibT_eX]

[DOI]

Abdul Wahid Hakmi

Hans-Joachim Wunderlich

Proceedings of the 2007 IEEE International Test Conference, 2007

Embedded multi-detect ATPG and Its Effect on the Detection of Unmodeled Defects.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International Test Conference, 2007

Experimental Studies on SAT-Based ATPG for Gate Delay Faults.

[BibT_eX]

[DOI]

Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007

Computation and Application of Absolute Dominators in Industrial Designs.

[BibT_eX]

[DOI]

Rene Krenz-Baath

Andreas Glowatz

Jürgen Schlöffel

Proceedings of the 12th European Test Symposium, 2007

2006

Fault detection and diagnosis with parity trees for space compaction of test responses.

[BibT_eX]

[DOI]

Proceedings of the 43rd Design Automation Conference, 2006

2005

PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

Andreas Glowatz

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