Harald P. E. Vranken

According to our database1, Harald P. E. Vranken authored at least 35 papers between 1994 and 2019.

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In proceedings 
PhD thesis 


On csauthors.net:


A Virtual Classroom for Cybersecurity Education.
Trans. Edutainment, 2019

Deep in the Dark: A Novel Threat Detection System using Darknet Traffic.
Proceedings of the 2019 IEEE International Conference on Big Data (IEEE BigData), 2019

Evaluation of transaction authentication methods for online banking.
Future Gener. Comput. Syst., 2018

Resilience of the Domain Name System: A case study of the .nl-domain.
Comput. Networks, 2018

Applying deep learning on packet flows for botnet detection.
Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018

Discovering software vulnerabilities using data-flow analysis and machine learning.
Proceedings of the 13th International Conference on Availability, Reliability and Security, 2018

Denial-of-Service Attacks on LoRaWAN.
Proceedings of the 13th International Conference on Availability, Reliability and Security, 2018

A Survey of Authentication and Communications Security in Online Banking.
ACM Comput. Surv., 2017

User-friendly Manual Transfer of Authenticated Online Banking Transaction Data - A Case Study that Applies the What You Enter Is What You Sign Transaction Authorization Information Scheme.
Proceedings of the 13th International Joint Conference on e-Business and Telecommunications (ICETE 2016), 2016

The Role of Internet Service Providers in Botnet Mitigation.
Proceedings of the 2016 European Intelligence and Security Informatics Conference, 2016

What You Enter Is What You Sign: Input Integrity in an Online Banking Environment.
Proceedings of the 2014 Workshop on Socio-Technical Aspects in Security and Trust, 2014

An Exercise Assistant for Practical Networking Courses.
Proceedings of the CSEDU 2014, 2014

An Exercise Assistant for Practical Networking and IT Security Courses in Higher Education.
Proceedings of the Computer Supported Education - 6th International Conference, 2014

Counter botnet activities in the Netherlands a study on organisation and effectiveness.
Proceedings of the 8th International Conference for Internet Technology and Secured Transactions, 2013

A distributed virtual computer security lab with central authority.
Proceedings of the Computer Science Education Research Conference, 2011

A Distributed Virtual Computer Security Lab.
Proceedings of the CSEDU 2011, 2011

The Impact of Server Virtualization on ITIL Processes.
Proceedings of the CLOSER 2011, 2011

Experiences with a synchronous virtual classroom in distance education.
Proceedings of the 13th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2008

Fault detection and diagnosis with parity trees for space compaction of test responses.
Proceedings of the 43rd Design Automation Conference, 2006

X-Masking During Logic BIST and Its Impact on Defect Coverage.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Efficient Pattern Mapping for Deterministic Logic BIST.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Impact of Test Point Insertion on Silicon Area and Timing during Layout.
Proceedings of the 2004 Design, 2004

ATPG Padding And ATE Vector Repeat Per Port For Reducing Test Data Volume.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Yield analysis for repairable embedded memories.
Proceedings of the 8th European Test Workshop, 2003

Enhanced Reduced Pin-Count Test for Full-Scan Design.
J. Electron. Test., 2002

Combining deterministic logic BIST with test point insertion.
Proceedings of the 7th European Test Workshop, 2002

Application of Deterministic Logic BIST on Industrial Circuits.
J. Electron. Test., 2001

Circuit partitioning for efficient logic BIST synthesis.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Debug Facilities in the TriMedia CPU64 Architecture.
J. Electron. Test., 2000

IC Design Validation Using Message Sequence Charts.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000

Behavior-Preserving Transformations for Design-for-Test.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000

TriMedia CPU64 Architecture.
Proceedings of the IEEE International Conference On Computer Design, 1999

Design-For-Debug in Hardware/Software Co-Design.
Proceedings of the Fifth International Workshop on Hardware/Software Codesign, 1997

Design for Testability in Hardware-Software Systems.
IEEE Des. Test Comput., 1996

System-Level Testability of Hardware/Software Systems.
Proceedings of the Proceedings IEEE International Test Conference 1994, 1994