Ihsen Alouani

According to our database1, Ihsen Alouani authored at least 20 papers between 2012 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


Power-efficient reliable register file for aggressive-environment applications.
IET Computers & Digital Techniques, 2020

Pedestrian detection using a moving camera: A novel framework for foreground detection.
Cogn. Syst. Res., 2020

HEAP: A Heterogeneous Approximate Floating-Point Multiplier for Error Tolerant Applications.
Proceedings of the 30th International Workshop on Rapid System Prototyping, 2019

Facial Expression Recognition Based on DWT Feature for Deep CNN.
Proceedings of the 6th International Conference on Control, 2019

A new memory reliability technique for multiple bit upsets mitigation.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

MDAD: A Multimodal and Multiview in-Vehicle Driver Action Dataset.
Proceedings of the Computer Analysis of Images and Patterns, 2019

A Novel Heterogeneous Approximate Multiplier for Low Power and High Performance.
Embedded Systems Letters, 2018

A Comprehensive Fault Injection Strategy for Embedded Systems Reliability Assessment.
Proceedings of the 2018 International Symposium on Rapid System Prototyping, 2018

A Reliability Study on CNNs for Critical Embedded Systems.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018

AS8-static random access memory (SRAM): asymmetric SRAM architecture for soft error hardening enhancement.
IET Circuits, Devices & Systems, 2017

Reconfigurable Hardened Latch and Flip-Flop for FPGAs.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Adaptive Reliability for Fault Tolerant Multicore Systems.
Proceedings of the Euromicro Conference on Digital System Design, 2017

Design of self-tuning reliable embedded systems and its application in railway transportation systems. (Conception de systèmes embarqués fiables et auto-réglables : applications sur les systèmes de transport ferroviaire).
PhD thesis, 2016

Register file reliability enhancement through adjacent narrow-width exploitation.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

NS-SRAM: Neighborhood Solidarity SRAM for Reliability Enhancement of SRAM Memories.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Auto-tuning Fault Tolerance Technique for DSP-Based Circuits in Transportation Systems.
Proceedings of the 1st International Workshop on RESource Awareness and Application Auto-tuning in Adaptive and heterogeNeous compuTing co-located with 19th International Conference on Design, 2016

A multi-objective approach for software/hardware partitioning in a multi-target tracking system.
Proceedings of the 2015 International Symposium on Rapid System Prototyping, 2015

Modeling transistor level masking of soft errors in combinational circuits.
Proceedings of the 2015 IEEE East-West Design & Test Symposium, 2015

ARABICA: A Reconfigurable Arithmetic Block for ISA Customization.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

Parity-based mono-Copy Cache for low power consumption and high reliability.
Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping, 2012