James F. Buckwalter
Orcid: 0000-0002-9390-0897
According to our database1,
James F. Buckwalter
authored at least 82 papers
between 2004 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
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Online presence:
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on orcid.org
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on 5g.ucsd.edu
On csauthors.net:
Bibliography
2023
Guest Editorial Introduction to the Special Section on the 2023 IEEE International Solid-State Circuits Conference (ISSCC).
IEEE J. Solid State Circuits, December, 2023
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023
An Automated Approach to Power Amplifier Design Demonstrated with a SiGe Process at 140 GHz.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
A 12-162 GHz Distributed Amplifier in a 45-nm BiCMOS SOI Process Achieving 2.67 THz Gain-Bandwidth Using an Active Bias Termination.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2023
An 18.6-dBm, 8-Way-Combined D-Band Power Amplifier with 21.6% PAE in 22-nm FD-SOI CMOS.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2023
2022
A 1-to-18GHz Distributed-Stacked-Complementary Triple-Balanced Passive Mixer With up to 33dBm IIP3 and Integrated LO Driver in 45nm CMOS SOI.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
A 111-149-GHz, Compact Power-combined Amplifier With 17.5-dBm P<sub>sat</sub>, 16.5% PAE in 22-nm CMOS FD-SOI.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
A 1-W/mm<sup>2</sup>, 140-GHz SiGe HBT Power Amplifier using Optimized Embedding Techniques.
Proceedings of the 2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2022
Improved Signal Integrity at 64 Gbps in a 130-nm SiGe Optical Receiver With Through-Silicon Vias.
Proceedings of the 2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2022
A 180-220-GHz, 12.7-dBm peak Psat and 17.3% peak PAE Power Amplifier in 250-nm InP HBT.
Proceedings of the 2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2022
2021
A Distributed Low-Noise Amplifier for Broadband Linearization of a Silicon Photonic Mach-Zehnder Modulator.
IEEE J. Solid State Circuits, 2021
A Full-Duplex Rake Receiver Using RF Code-Domain Signal Processing for Multipath Environments.
IEEE J. Solid State Circuits, 2021
INTREPID program: technology and architecture for next-generation, energy-efficient, hyper-scale data centers [Invited].
JOCN, 2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the European Conference on Optical Communication, 2021
Prospects for High-Efficiency Silicon and lll-V Power Amplifiers and Transmitters in 100-300 GHz Bands.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
An 8.2-pJ/bit, 56 Gb/s Traveling-wave Modulator Driver with Large Reverse Terminations.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2021
Understanding Energy Efficiency and Interference Tolerance in Millimeter Wave Receivers.
Proceedings of the 55th Asilomar Conference on Signals, Systems, and Computers, 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
A 30-GHz CMOS SOI Outphasing Power Amplifier With Current Mode Combining for High Backoff Efficiency and Constant Envelope Operation.
IEEE J. Solid State Circuits, 2020
High-Rejection RF Code Domain Receivers for Simultaneous Transmit and Receive Applications.
IEEE J. Solid State Circuits, 2020
A Code-Domain RF Signal Processing Front End With High Self-Interference Rejection and Power Handling for Simultaneous Transmit and Receive.
IEEE J. Solid State Circuits, 2020
A Reconfigurable Spectrum-Compressing Receiver for Non-Contiguous Carrier Aggregation in CMOS SOI.
IEEE J. Solid State Circuits, 2020
A Novel Concept using Derivative Superposition at the Device-Level to Reduce Linearity Sensitivity to Bias in N-polar GaN MISHEMT.
Proceedings of the 2020 Device Research Conference, 2020
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2020
Proceedings of the 2nd 6G Wireless Summit, 2020
2019
Monolithically-Integrated 50 Gbps 2pJ/bit Photoreceiver with Cherry-Hooper TIA in 250nm BiCMOS Technology.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019
MillimeTera: Toward A Large-Scale Open-Source mmWave and Terahertz Experimental Testbed.
Proceedings of the 3rd ACM Workshop on Millimeter-wave Networks and Sensing Systems, 2019
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
Proceedings of the 2019 IEEE International Symposium on Dynamic Spectrum Access Networks, 2019
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
Proceedings of the 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019
2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A High-Fractional-Bandwidth, Millimeter-Wave Bidirectional Image-Selection Architecture With Narrowband LO Tuning Requirements.
IEEE J. Solid State Circuits, 2018
A high-efficiency 28GHz outphasing PA with 23dBm output power using a triaxial balun combiner.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
A 28-GHz, 18-dBm, 48% PAE Stacked-FET Power Amplifier with Coupled-Inductor Neutralization in 45-nm SOI CMOS.
Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018
2017
IEEE J. Solid State Circuits, 2017
2016
Source Coding and Preemphasis for Double-Edged Pulsewidth Modulation Serial Communication.
IEEE Trans. Very Large Scale Integr. Syst., 2016
A Differential Oscillator Injection Locking Technique for an 8 GHz Outphasing Modulator With 22.7% Modulation Efficiency.
IEEE J. Solid State Circuits, 2016
IEEE J. Solid State Circuits, 2016
IEEE J. Solid State Circuits, 2016
13.4 A microwave injection-locking outphasing modulator with 30dB dynamic range and 22% system efficiency in 45nm CMOS SOI.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
A recursive house-of-cards digital power amplifier employing a λ/4-less Doherty power combiner in 65nm CMOS.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2015
A High-Linearity, 30 GS/s Track-and-Hold Amplifier and Time Interleaved Sample-and-Hold in an InP-on-CMOS Process.
IEEE J. Solid State Circuits, 2015
2014
Energy Efficiency Optimization Through Codesign of the Transmitter and Receiver in High-Speed On-Chip Interconnects.
IEEE Trans. Very Large Scale Integr. Syst., 2014
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
A 10 bit, 300 MS/s Nyquist Current-Steering Power DAC With 6 V<sub>PP</sub> Output Swing.
IEEE J. Solid State Circuits, 2014
IEEE J. Solid State Circuits, 2014
30.8 A 30GS/s double-switching track-and-hold amplifier with 19dBm IIP3 in an InP BiCMOS technology.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
A Multichannel Serial Link Receiver With Dual-Loop Clock-and-Data Recovery and Channel Equalization.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
IEEE J. Solid State Circuits, 2013
Proceedings of the 2013 IEEE Radio and Wireless Symposium, 2013
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
IEEE J. Solid State Circuits, 2012
IEEE J. Solid State Circuits, 2012
A Monolithic 25-Gb/s Transceiver With Photonic Ring Modulators and Ge Detectors in a 130-nm CMOS SOI Process.
IEEE J. Solid State Circuits, 2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
2010
Bandwidth Enhancement With Low Group-Delay Variation for a 40-Gb/s Transimpedance Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
Performance prediction of throughput-centric pipelined global interconnects with voltage scaling.
Proceedings of the International Workshop on System Level Interconnect Prediction Workshop, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
2009
Proceedings of the 11th International Workshop on System-Level Interconnect Prediction (SLIP 2009), 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Design methodology of high performance on-chip global interconnect using terminated transmission-line.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
Proceedings of the 16th Annual IEEE Symposium on High Performance Interconnects (HOTI 2008), 2008
2006
IEEE J. Solid State Circuits, 2006
IEEE J. Solid State Circuits, 2006
2005
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004